mirror of https://github.com/VLSIDA/OpenRAM.git
Missing import fix.
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@ -13,6 +13,7 @@ from tech import drc, GDS
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from tech import layer as techlayer
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from tech import layer_indices
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from tech import layer_stacks
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from tech import preferred_directions
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import os
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from globals import OPTS
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from vector import vector
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@ -8,13 +8,14 @@
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#
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import unittest
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from testutils import *
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import sys,os
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import sys, os
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sys.path.append(os.getenv("OPENRAM_HOME"))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class hierarchical_predecode2x4_test(openram_test):
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def runTest(self):
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@ -8,13 +8,14 @@
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#
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import unittest
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from testutils import *
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import sys,os
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import sys, os
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sys.path.append(os.getenv("OPENRAM_HOME"))
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import globals
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from globals import OPTS
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from sram_factory import factory
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import debug
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class hierarchical_predecode3x8_test(openram_test):
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def runTest(self):
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@ -16,7 +16,6 @@ from sram_factory import factory
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import debug
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# @unittest.skip("SKIPPING hierarchical_predecode4x16_test")
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class hierarchical_predecode4x16_test(openram_test):
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def runTest(self):
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