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Improvements to power routing.

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Improved the route horizontal and vertical pin functions to
create a single pin at the end.
Swapped A and B on wordline driver input for cleaner routing
in most technologies.
Fixed vertical supply routing in port_address.
This commit is contained in:
mrg
2022-03-04 15:44:07 -08:00
parent 10bec414e8
commit 8b3c10ae79
5 changed files with 92 additions and 59 deletions
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compiler/modules/hierarchical_decoder.py
+6 -6
View File
@@ -596,10 +596,10 @@ class hierarchical_decoder(design.design):
"""
if layer_props.hierarchical_decoder.vertical_supply:
pre_insts = self.pre2x4_inst + self.pre3x8_inst + self.pre4x16_inst
self.route_vertical_pins("vdd", insts=pre_insts)
self.route_vertical_pins("gnd", insts=pre_insts)
self.route_vertical_pins("vdd", insts=self.and_inst)
self.route_vertical_pins("gnd", insts=self.and_inst)
self.route_vertical_pins("vdd", insts=pre_insts, yside="by")
self.route_vertical_pins("gnd", insts=pre_insts, yside="by")
self.route_vertical_pins("vdd", insts=self.and_inst, yside="by")
self.route_vertical_pins("gnd", insts=self.and_inst, yside="by")
return
for n in ["vdd", "gnd"]:
pins = self.and_inst[0].get_pins(n)
@@ -622,8 +622,8 @@ class hierarchical_decoder(design.design):
pre_insts = self.pre2x4_inst + self.pre3x8_inst + self.pre4x16_inst
self.route_vertical_pins("vdd", insts=pre_insts)
self.route_vertical_pins("gnd", insts=pre_insts)
self.route_vertical_pins("vdd", insts=self.and_inst, side="right")
self.route_vertical_pins("gnd", insts=self.and_inst, side="left")
self.route_vertical_pins("vdd", insts=self.and_inst, xside="rx")
self.route_vertical_pins("gnd", insts=self.and_inst, xside="lx")
# Widen the rails to cover any gap
for inst in self.and_inst: