mirror of https://github.com/VLSIDA/OpenRAM.git
Remove unnecessary feasible period search.
This commit is contained in:
parent
9092fa4ee6
commit
8815ddf7f1
|
|
@ -43,8 +43,8 @@ class sram_1bank_nomux_func_test(openram_test):
|
|||
s.sp_write(tempspice)
|
||||
|
||||
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
|
||||
|
||||
f = functional(s.s, tempspice, corner)
|
||||
|
||||
f.num_cycles = 10
|
||||
(fail, error) = f.run()
|
||||
self.assertTrue(fail,error)
|
||||
|
|
|
|||
|
|
@ -51,8 +51,6 @@ class psram_1bank_nomux_func_test(openram_test):
|
|||
|
||||
corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
|
||||
f = functional(s.s, tempspice, corner)
|
||||
d = delay(s.s, tempspice, corner)
|
||||
feasible_period = self.find_feasible_test_period(d, s.s, f.load, f.slew)
|
||||
|
||||
f.num_cycles = 10
|
||||
(fail, error) = f.run()
|
||||
|
|
|
|||
Loading…
Reference in New Issue