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modified template engine & sram multibank class

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Bugra Onal
2022-07-28 15:03:41 -07:00
parent bbcbddd934
commit 846dfc79dc
8 changed files with 125 additions and 265 deletions
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compiler/base/verilog.py
+1 -1
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@@ -7,7 +7,7 @@
#
import math
from tech import spice
import verilog_template
from verilog_template import verilog_template
class verilog: