luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Reduce verbosity of routing info

This commit is contained in:
mrg 2021-03-31 09:38:06 -07:00
parent b9086dbbe5
commit 7e29dd7ff2
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
compiler/router/supply_tree_router.py
View File

@ -110,7 +110,7 @@ class supply_tree_router(router):
# Route MST components # Route MST components
for index, (src, dest) in enumerate(connections): for index, (src, dest) in enumerate(connections):
if not (index % 100): if not (index % 100):
debug.info(0, "{0} supply segments routed, {1} remaining.".format(index, len(connections) - index)) debug.info(1, "{0} supply segments routed, {1} remaining.".format(index, len(connections) - index))
self.route_signal(pin_name, src, dest) self.route_signal(pin_name, src, dest)
# if pin_name == "gnd": # if pin_name == "gnd":
# print("\nSRC {}: ".format(src) + str(self.pin_groups[pin_name][src].grids) + str(self.pin_groups[pin_name][src].blockages)) # print("\nSRC {}: ".format(src) + str(self.pin_groups[pin_name][src].grids) + str(self.pin_groups[pin_name][src].blockages))