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Cleanup and rename vias.
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@@ -8,7 +8,7 @@
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import os
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from design_rules import *
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from module_type import *
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from custom_cell_properties import CellProperties
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from custom_cell_properties import cell_properties
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"""
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File containing the process technology parameters for FreePDK 45nm.
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@@ -23,15 +23,16 @@ File containing the process technology parameters for FreePDK 45nm.
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# Using tech_modules['cellname'] you can override each class by providing a custom
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# implementation in '$OPENRAM_TECHDIR/modules/'
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# For example: tech_modules['contact'] = 'contact_freepdk45'
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tech_modules = ModuleType()
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tech_modules = module_type()
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###################################################
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# Custom cell properties
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###################################################
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cell_properties = CellProperties()
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cell_properties = cell_properties()
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cell_properties.bitcell.mirror.x = True
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cell_properties.bitcell.mirror.y = False
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###################################################
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# GDS file info
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###################################################
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@@ -8,7 +8,7 @@
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import os
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from design_rules import *
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from module_type import *
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from custom_cell_properties import CellProperties
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from custom_cell_properties import cell_properties
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"""
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File containing the process technology parameters for SCMOS 4m, 0.35um
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@@ -23,12 +23,12 @@ File containing the process technology parameters for SCMOS 4m, 0.35um
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# Using tech_modules['cellname'] you can override each class by providing a custom
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# implementation in '$OPENRAM_TECHDIR/modules/'
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# For example: tech_modules['contact'] = 'contact_scn4m'
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tech_modules = ModuleType()
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tech_modules = module_type()
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###################################################
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# Custom cell properties
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###################################################
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cell_properties = CellProperties()
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cell_properties = cell_properties()
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cell_properties.bitcell.mirror.x = True
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cell_properties.bitcell.mirror.y = False
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