mirror of https://github.com/VLSIDA/OpenRAM.git
fix VPB/VNB pins not being found
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parent
3113798b13
commit
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2
Makefile
2
Makefile
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@ -13,7 +13,7 @@ SRAM_LIB_GIT_REPO ?= https://github.com/vlsida/sky130_fd_bd_sram.git
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# Use this for development
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# Use this for development
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#SRAM_LIB_GIT_REPO ?= git@github.com:VLSIDA/sky130_fd_bd_sram.git
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#SRAM_LIB_GIT_REPO ?= git@github.com:VLSIDA/sky130_fd_bd_sram.git
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#SRAM_LIB_GIT_REPO ?= https://github.com/google/skywater-pdk-libs-sky130_fd_bd_sram.git
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#SRAM_LIB_GIT_REPO ?= https://github.com/google/skywater-pdk-libs-sky130_fd_bd_sram.git
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SRAM_LIB_GIT_COMMIT ?= 9fcf3a78398037583b6d6c1ebac71957343c4bd8
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SRAM_LIB_GIT_COMMIT ?= dd64256961317205343a3fd446908b42bafba388
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# Open PDKs
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# Open PDKs
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OPEN_PDKS_DIR ?= $(PDK_ROOT)/open_pdks
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OPEN_PDKS_DIR ?= $(PDK_ROOT)/open_pdks
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@ -114,15 +114,15 @@ cell_properties.bitcell_2port.vdd_dir = "H"
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cell_properties.bitcell_2port.gnd_layer = "m2"
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cell_properties.bitcell_2port.gnd_layer = "m2"
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cell_properties.bitcell_2port.gnd_dir = "H"
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cell_properties.bitcell_2port.gnd_dir = "H"
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cell_properties.col_cap_1port_bitcell = d.cell(['bl', 'vdd', 'gnd', 'br', 'gate', 'vpb', 'vnb'],
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cell_properties.col_cap_1port_bitcell = d.cell(['bl', 'br', 'vdd', 'gnd', 'vpb', 'vnb', 'gate'],
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['INPUT', 'POWER', 'GROUND', 'INPUT', 'INPUT', 'BIAS', 'BIAS'],
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['INPUT', 'INPUT','POWER', 'GROUND', 'BIAS', 'BIAS', 'INPUT'],
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{'bl': 'bl',
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{'bl': 'bl',
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'br': 'br',
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'br': 'br',
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'vdd': 'vdd',
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'vdd': 'vdd',
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'gnd': 'gnd',
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'gnd': 'gnd',
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'gate': 'gate',
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'vnb': 'vnb',
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'vnb': 'vnb',
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'vpb': 'vpb'})
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'vpb': 'vpb',
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'gate': 'gate'})
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cell_properties.col_cap_1port_bitcell.boundary_layer = "mem"
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cell_properties.col_cap_1port_bitcell.boundary_layer = "mem"
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cell_properties.col_cap_1port_strap_power = d.cell(['vdd', 'vpb', 'vnb'],
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cell_properties.col_cap_1port_strap_power = d.cell(['vdd', 'vpb', 'vnb'],
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@ -415,8 +415,8 @@ label_purpose = 5
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# pin_read purposes
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# pin_read purposes
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special_purposes = {layer["nwell"][0]: [layer["nwell"][1], 5, 59, 16]}
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special_purposes = {layer["nwell"][0]: [layer["nwell"][1], 5, 59, 16]}
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#layer_override = {"VNB\x00": ["pwell",122]}
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#layer_override = {"VNB\x00": ["pwell",122]}
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layer_override = {"VNB": layer["pwellp"]}
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layer_override = {"vnb": layer["pwellp"], "VNB": layer["pwellp"]}
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layer_override_name = {"VNB": "pwellp"}
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layer_override_name = {"vnb": "pwellp", "VNB": "pwellp"}
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layer_override_purpose = {122: (64, 59)}
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layer_override_purpose = {122: (64, 59)}
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# Layer names for external PDKs
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# Layer names for external PDKs
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layer_names = {}
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layer_names = {}
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