luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Remove extra well tap to save area.

This commit is contained in:
mrg 2022-03-07 15:38:25 -08:00
parent f17d661e3a
commit 772fbd6f96
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
compiler/pgates/pand2.py
View File

@ -32,7 +32,7 @@ class pand2(pgate.pgate):
def create_modules(self): def create_modules(self):
self.nand = factory.create(module_type="pnand2", self.nand = factory.create(module_type="pnand2",
height=self.height, height=self.height,
add_wells=self.add_wells) add_wells=False)
self.inv = factory.create(module_type="pdriver", self.inv = factory.create(module_type="pdriver",
size_list=[self.size], size_list=[self.size],