Merge branch 'magic_netgen_support' into dev

compiler/characterizer/__init__.py

@@ -0,0 +1,31 @@
+import os
+import debug
+from globals import OPTS,find_exe,get_tool
+import lib
+import delay
+import setup_hold
+
+
+debug.info(2,"Initializing characterizer...")
+
+spice_exe = ""
+
+if OPTS.analytical_delay:
+    debug.info(1,"Using analytical delay models (no characterization)")
+else:
+    if OPTS.spice_version != "":
+        spice_exe=find_exe(OPTS.spice_version)
+        if spice_exe=="":
+            debug.error("{0} not found. Unable to perform characterization.".format(OPTS.spice_version),1)
+    else:
+        (choice,spice_exe) = get_tool("spice",["xa", "hspice", "ngspice", "ngspice.exe"])
+        OPTS.spice_version = choice
+
+    # set the input dir for spice files if using ngspice 
+    if OPTS.spice_version == "ngspice":
+        os.environ["NGSPICE_INPUT_DIR"] = "{0}".format(OPTS.openram_temp)
+    
+    if spice_exe == "":
+        debug.error("No recognizable spice version found. Unable to perform characterization.",1)
+
+

compiler/characterizer/charutils.py

@@ -1,8 +1,6 @@
-import globals
 import re
 import debug
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
         
 def relative_compare(value1,value2,error_tolerance=0.001):

compiler/characterizer/delay.py

@@ -1,14 +1,12 @@
 import sys
 import re
-import globals
 import debug
 import tech
 import math
 import stimuli
 import charutils as ch
 import utils
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
 class delay():
     """

compiler/characterizer/lib.py

@@ -1,7 +1,6 @@
 import os
 import sys
 import re
-import globals
 import debug
 import tech
 import math
@@ -11,8 +10,7 @@ import charutils as ch
 import tech
 import numpy as np
 from trim_spice import trim_spice
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
 class lib:
     """ lib file generation."""

compiler/characterizer/setup_hold.py

@@ -1,12 +1,10 @@
 import sys
-import globals
 import tech
 import stimuli
 import debug
 import charutils as ch
 import ms_flop
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
 
 class setup_hold():

compiler/characterizer/stimuli.py

@@ -4,15 +4,13 @@ simulation.  There are various functions that can be be used to
 generate stimulus for other simulations as well.
 """
 
-import globals
 import tech
 import debug
 import subprocess
 import os
 import sys
 import numpy as np
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
 vdd_voltage = tech.spice["supply_voltage"]
 gnd_voltage = tech.spice["gnd_voltage"]
@@ -278,21 +276,22 @@ def run_sim():
     temp_stim = "{0}stim.sp".format(OPTS.openram_temp)
     
     
+    from characterizer import spice_exe
     if OPTS.spice_version == "xa":
-        cmd = "{0} {1} -o {2}xa -mt 20".format(OPTS.spice_exe,
+        cmd = "{0} {1} -o {2}xa -mt 20".format(spice_exe,
                                                temp_stim,
                                                OPTS.openram_temp)
         valid_retcode=0
     elif OPTS.spice_version == "hspice":
         # TODO: Should make multithreading parameter a configuration option
-        cmd = "{0} -mt 2 -i {1} -o {2}timing".format(OPTS.spice_exe,
+        cmd = "{0} -mt 2 -i {1} -o {2}timing".format(spice_exe,
                                                      temp_stim,
                                                      OPTS.openram_temp)
         valid_retcode=0
     else:
-        cmd = "{0} -b -o {2}timing.lis {1}".format(OPTS.spice_exe,
+        cmd = "{0} -b -o {2}timing.lis {1}".format(spice_exe,
-                                                        temp_stim,
+                                                   temp_stim,
-                                                        OPTS.openram_temp)
+                                                   OPTS.openram_temp)
         # for some reason, ngspice-25 returns 1 when it only has acceptable warnings
         valid_retcode=1
 

compiler/debug.py

@@ -30,7 +30,7 @@ def warning(str):
 
 
 def info(lev, str):
-    OPTS = globals.get_opts()
+    from globals import OPTS
     if (OPTS.debug_level >= lev):
         frm = inspect.stack()[1]
         mod = inspect.getmodule(frm[0])

compiler/design.py

@@ -1,11 +1,10 @@
 import hierarchy_layout
 import hierarchy_spice
 import globals
-import calibre
+import verify
 import debug
 import os
-
+from globals import OPTS
-OPTS = globals.get_opts()
 
 
 class design(hierarchy_spice.spice, hierarchy_layout.layout):
@@ -56,8 +55,8 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
             tempgds = OPTS.openram_temp + "/temp.gds"
             self.sp_write(tempspice)
             self.gds_write(tempgds)
-            debug.check(calibre.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
+            debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
-            debug.check(calibre.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
+            debug.check(verify.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
             os.remove(tempspice)
             os.remove(tempgds)
 
@@ -66,7 +65,7 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
         if OPTS.check_lvsdrc:
             tempgds = OPTS.openram_temp + "/temp.gds"
             self.gds_write(tempgds)
-            debug.check(calibre.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
+            debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
             os.remove(tempgds)
 
     def LVS(self):
@@ -76,7 +75,7 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
             tempgds = OPTS.openram_temp + "/temp.gds"
             self.sp_write(tempspice)
             self.gds_write(tempgds)
-            debug.check(calibre.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
+            debug.check(verify.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
             os.remove(tempspice)
             os.remove(tempgds)
 

compiler/globals.py

@@ -25,15 +25,8 @@ minor_python_version = sys.version_info.minor
 if not (major_python_version == 2 and minor_python_version >= 7):
     debug.error("Python 2.7 is required.",-1)
 
-def is_exe(fpath):
-    return os.path.exists(fpath) and os.access(fpath, os.X_OK)
-
-# parse the optional arguments
-# this only does the optional arguments
-
-
 def parse_args():
-    """Parse the arguments and initialize openram"""
+    """ Parse the optional arguments for OpenRAM """
 
     global OPTS
 
@@ -60,8 +53,8 @@ def parse_args():
                              help="Use analytical models to calculate delays (default)"),
         optparse.make_option("-c", "--characterize", action="store_false", dest="analytical_delay",
                              help="Perform characterization to calculate delays (default is analytical models)")
+        # -h --help is implicit.
     }
-# -h --help is implicit.
 
     parser = optparse.OptionParser(option_list=option_list,
                                    description="Compile and/or characterize an SRAM.",
@@ -75,13 +68,8 @@ def parse_args():
     if OPTS.tech_name == "":
         OPTS.tech_name = "freepdk45"
     
-
     return (options, args)
 
-
-def get_opts():
-    return(OPTS)
-
 def print_banner():
     """ Conditionally print the banner to stdout """
     global OPTS
@@ -113,23 +101,50 @@ def init_openram(config_file):
 
     import_tech()
 
-    set_spice()
+def get_tool(tool_type, preferences):
+    """
+    Find which tool we have from a list of preferences and return the
+    one selected and its full path.
+    """
+    debug.info(2,"Finding {} tool...".format(tool_type))
+    global OPTS
 
-    set_calibre()
+    for name in preferences:
+        exe_name = find_exe(name)
+        if exe_name != None:
+            debug.info(1, "Using {0}: {1}".format(tool_type,exe_name))
+            return(name,exe_name)
+        else:
+            debug.info(1, "Could not find {0}, trying next {1} tool.".format(name,tool_type))
+    else:
+        return(None,"")
 
+    
 
 def read_config(config_file):
-    global OPTS
+    """ 
-    
+    Read the configuration file that defines a few parameters. The
-    OPTS.config_file = config_file
+    config file is just a Python file that defines some config
-    OPTS.config_file = re.sub(r'\.py$', "", OPTS.config_file)
+    options. 
+    """
 
-    # dynamically import the configuration file of which modules to use
+    # Create a full path relative to current dir unless it is already an abs path
-    debug.info(1, "Configuration file is " + OPTS.config_file + ".py")
+    if not os.path.isabs(config_file):
+        config_file = os.getcwd() + "/" +  config_file
+    # Make it a python file if the base name was only given
+    config_file = re.sub(r'\.py$', "", config_file)
+    # Expand the user if it is used
+    config_file = os.path.expanduser(config_file)
+    # Add the path to the system path so we can import things in the other directory
+    dir_name = os.path.dirname(config_file)
+    file_name = os.path.basename(config_file)
+    sys.path.append(dir_name)
+    # Import the configuration file of which modules to use
+    debug.info(1, "Configuration file is " + config_file + ".py")
     try:
-        OPTS.config = importlib.import_module(OPTS.config_file)
+        OPTS.config = importlib.import_module(file_name) 
     except:
-        debug.error("Unable to read configuration file: {0}".format(OPTS.config_file+".py. Did you specify the technology?"),2)
+        debug.error("Unable to read configuration file: {0}".format(config_file),2)
 
     # This path must be setup after the config file.
     try:
@@ -154,30 +169,7 @@ def read_config(config_file):
         debug.error("Unable to make output directory.",-1)
     
         
-
+        
-def set_calibre():
-    debug.info(2,"Finding calibre...")
-    global OPTS
-
-    # check if calibre is installed, if so, we should be running LVS/DRC on
-    # everything.
-    if not OPTS.check_lvsdrc:
-        # over-ride the check LVS/DRC option
-        debug.info(0,"Over-riding LVS/DRC. Not performing LVS/DRC.")
-    else:
-        # see if calibre is in the path (extend to other tools later)
-        for path in os.environ["PATH"].split(os.pathsep):
-            OPTS.calibre_exe = os.path.join(path, "calibre")
-            # if it is found, do inline LVS/DRC
-            if is_exe(OPTS.calibre_exe):
-                OPTS.check_lvsdrc = True
-                debug.info(1, "Using calibre: " + OPTS.calibre_exe)
-                break
-        else:
-            # otherwise, give warning and procede
-            debug.warning("Calibre not found. Not performing LVS/DRC.")
-            OPTS.check_lvsdrc = False
-
 def end_openram():
     """ Clean up openram for a proper exit """
     cleanup_paths()
@@ -189,7 +181,9 @@ def end_openram():
     
     
 def cleanup_paths():
-    # we should clean up this temp directory after execution...
+    """
+    We should clean up the temp directory after execution.
+    """
     if os.path.exists(OPTS.openram_temp):
         shutil.rmtree(OPTS.openram_temp, ignore_errors=True)
             
@@ -211,9 +205,6 @@ def setup_paths():
     debug.check(os.path.isdir(OPENRAM_HOME+"/tests"),
                 "$OPENRAM_HOME/tests does not exist: {0}".format(OPENRAM_HOME+"/tests"))
     sys.path.append("{0}/tests".format(OPENRAM_HOME))
-    debug.check(os.path.isdir(OPENRAM_HOME+"/characterizer"),
-                "$OPENRAM_HOME/characterizer does not exist: {0}".format(OPENRAM_HOME+"/characterizer"))
-    sys.path.append("{0}/characterizer".format(OPENRAM_HOME))
     debug.check(os.path.isdir(OPENRAM_HOME+"/router"),
                 "$OPENRAM_HOME/router does not exist: {0}".format(OPENRAM_HOME+"/router"))
     sys.path.append("{0}/router".format(OPENRAM_HOME))
@@ -232,47 +223,19 @@ def setup_paths():
             os.chmod(OPTS.openram_temp, 0o750)
 
 
-    
+def is_exe(fpath):
+    """ Return true if the given is an executable file that exists. """
+    return os.path.exists(fpath) and os.access(fpath, os.X_OK)
 
-def find_spice(check_exe):
+def find_exe(check_exe):
+    """ Check if the binary exists in any path dir and return the full path. """
     # Check if the preferred spice option exists in the path
     for path in os.environ["PATH"].split(os.pathsep):
-        spice_exe = os.path.join(path, check_exe)
+        exe = os.path.join(path, check_exe)
         # if it is found, then break and use first version
-        if is_exe(spice_exe):
+        if is_exe(exe):
-            OPTS.spice_exe = spice_exe
+            return exe
-            return True
+    return None
-    return False
-
-def set_spice():
-    debug.info(2,"Finding spice...")
-    global OPTS
-
-    if OPTS.analytical_delay:
-        debug.info(1,"Using analytical delay models (no characterization)")
-        return
-    else:
-        spice_preferences = ["xa", "hspice", "ngspice", "ngspice.exe"]
-        if OPTS.spice_version != "":
-            if not find_spice(OPTS.spice_version):
-                debug.error("{0} not found. Unable to perform characterization.".format(OPTS.spice_version),1)
-        else:
-            for spice_name in spice_preferences:
-                if find_spice(spice_name):
-                    OPTS.spice_version=spice_name
-                    debug.info(1, "Using spice: " + OPTS.spice_exe)
-                    break
-                else:
-                    debug.info(1, "Could not find {}, trying next spice simulator. ".format(spice_name))
-
-    # set the input dir for spice files if using ngspice 
-    if OPTS.spice_version == "ngspice":
-        os.environ["NGSPICE_INPUT_DIR"] = "{0}".format(OPTS.openram_temp)
-
-    if OPTS.spice_exe == "":
-        debug.error("No recognizable spice version found. Unable to perform characterization.",1)
-
-
         
 # imports correct technology directories for testing
 def import_tech():

compiler/nand_3.py

@@ -36,7 +36,7 @@ class nand_3(design.design):
 
         self.add_pins()
         self.create_layout()
-        self.DRC_LVS()
+        #self.DRC_LVS()
 
     def add_pins(self):
         """ add pics for this module """

compiler/openram.py

@@ -10,20 +10,12 @@ a Liberty (.lib) file for timing analysis/optimization
 
 """
 
-__author__ = "Matthew Guthaus (mrg@ucsc.edu) and numerous others"
-__version__ = "$Revision: 0.9 $"
-__copyright__ = "Copyright (c) 2015 UCSC and OSU"
-__license__ = "This is not currently licensed for use outside of UCSC's VLSI-DA and OSU's VLSI group."
-
-
 import sys,os
 import datetime
 import re
 import importlib
 import globals
 
-global OPTS
-
 (OPTS, args) = globals.parse_args()
 
 def print_time(name, now_time, last_time=None):
@@ -72,17 +64,18 @@ print("Output files are " + OPTS.output_name + ".(sp|gds|v|lib|lef)")
 print("Technology: {0}".format(OPTS.tech_name))
 print("Word size: {0}\nWords: {1}\nBanks: {2}".format(word_size,num_words,num_banks))
 
+if not OPTS.check_lvsdrc:
+    print("DRC/LVS/PEX checking is disabled.")
 
 if OPTS.analytical_delay:
     print("Using analytical delay models (no characterization)")
 else:
     print("Performing simulation-based characterization with {}".format(OPTS.spice_version))
-
+    if OPTS.trim_netlist:
-if OPTS.trim_netlist:
+        print("Trimming netlist to speed up characterization (sacrificing some accuracy).")
-    print("Trimming netlist to speed up characterization (sacrificing some accuracy).")
 
 # only start importing modules after we have the config file
-import calibre
+import verify
 import sram
 
 start_time = datetime.datetime.now()
@@ -111,10 +104,10 @@ last_time=print_time("Spice writing", datetime.datetime.now(), last_time)
 sram_file = spname
 if OPTS.use_pex:
     sram_file = OPTS.output_path + "temp_pex.sp"
-    calibre.run_pex(s.name, gdsname, spname, output=sram_file)
+    verify.run_pex(s.name, gdsname, spname, output=sram_file)
 
 # Characterize the design
-import lib
+from characterizer import lib
 libname = OPTS.output_path + s.name + ".lib"
 print("LIB: Writing to {0}".format(libname))
 lib.lib(libname,s,sram_file)

compiler/options.py

@@ -22,8 +22,10 @@ class options(optparse.Values):
     spice_version = ""
     # Should we print out the banner at startup
     print_banner = True
-    # The Calibre executable being used which is derived from the user PATH.
+    # The DRC/LVS/PEX executable being used which is derived from the user PATH.
-    calibre_exe = ""
+    drc_exe = ""
+    lvs_exe = ""
+    pex_exe = ""
     # The spice executable being used which is derived from the user PATH.
     spice_exe = ""
     # Run with extracted parasitics

compiler/tests/00_code_format_check_test.py

@@ -6,7 +6,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import re
 
 #@unittest.skip("SKIPPING 00_format check test")

compiler/tests/01_library_drc_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import re
 
 OPTS = globals.OPTS
@@ -29,7 +29,7 @@ class library_drc_test(unittest.TestCase):
             if not os.path.isfile(gds_name):
                 drc_errors += 1
                 debug.error("Missing GDS file: {}".format(gds_name))
-            drc_errors += calibre.run_drc(name, gds_name)
+            drc_errors += verify.run_drc(name, gds_name)
 
         # fails if there are any DRC errors on any cells
         self.assertEqual(drc_errors, 0)

compiler/tests/02_library_lvs_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import re
 
 OPTS = globals.OPTS
@@ -33,7 +33,7 @@ class library_lvs_test(unittest.TestCase):
             if not os.path.isfile(sp_name):
                 lvs_errors += 1
                 debug.error("Missing SPICE file {}".format(gds_name))
-            lvs_errors += calibre.run_lvs(f, gds_name, sp_name)
+            lvs_errors += verify.run_lvs(f, gds_name, sp_name)
 
         # fail if the error count is not zero
         self.assertEqual(lvs_errors, 0)

compiler/tests/03_contact_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -52,7 +52,7 @@ class contact_test(unittest.TestCase):
     def local_check(self, c):
         tempgds = OPTS.openram_temp + "temp.gds"
         c.gds_write(tempgds)
-        self.assertFalse(calibre.run_drc(c.name, tempgds))
+        self.assertFalse(verify.run_drc(c.name, tempgds))
         os.remove(tempgds)
 
 

compiler/tests/03_path_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -94,7 +94,7 @@ class path_test(unittest.TestCase):
     def local_check(self, w):
         tempgds = OPTS.openram_temp + "temp.gds"
         w.gds_write(tempgds)
-        self.assertFalse(calibre.run_drc(w.name, tempgds))
+        self.assertFalse(verify.run_drc(w.name, tempgds))
         os.remove(tempgds)
 
 

compiler/tests/03_ptx_1finger_nmos_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -144,10 +144,9 @@ class ptx_test(unittest.TestCase):
         fet.sp_write(tempspice)
         fet.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(fet.name, tempgds))
+        self.assertFalse(verify.run_drc(fet.name, tempgds))
 
-        os.remove(tempspice)
+        globals.end_openram()
-        os.remove(tempgds)
 
 # instantiate a copy of the class to actually run the test
 if __name__ == "__main__":

compiler/tests/03_ptx_1finger_pmos_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -144,7 +144,7 @@ class ptx_test(unittest.TestCase):
         fet.sp_write(tempspice)
         fet.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(fet.name, tempgds))
+        self.assertFalse(verify.run_drc(fet.name, tempgds))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/03_ptx_3finger_nmos_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -145,7 +145,7 @@ class ptx_test(unittest.TestCase):
         fet.sp_write(tempspice)
         fet.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(fet.name, tempgds))
+        self.assertFalse(verify.run_drc(fet.name, tempgds))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/03_ptx_3finger_pmos_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -145,7 +145,7 @@ class ptx_test(unittest.TestCase):
         fet.sp_write(tempspice)
         fet.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(fet.name, tempgds))
+        self.assertFalse(verify.run_drc(fet.name, tempgds))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/03_wire_test.py

@@ -7,7 +7,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -132,7 +132,7 @@ class wire_test(unittest.TestCase):
     def local_check(self, w):
         tempgds = OPTS.openram_temp + "temp.gds"
         w.gds_write(tempgds)
-        self.assertFalse(calibre.run_drc(w.name, tempgds))
+        self.assertFalse(verify.run_drc(w.name, tempgds))
         os.remove(tempgds)
 
 

compiler/tests/04_nand_2_test.py

@@ -11,7 +11,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import sys
 
 OPTS = globals.OPTS
@@ -44,8 +44,8 @@ class nand_2_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/04_nand_3_test.py

@@ -11,7 +11,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -40,8 +40,8 @@ class nand_3_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/04_nor_2_test.py

@@ -10,7 +10,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import sys
 
 OPTS = globals.OPTS
@@ -42,8 +42,8 @@ class nor_2_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
         
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/04_pinv_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -47,8 +47,8 @@ class pinv_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/04_precharge_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import sys
 
 OPTS = globals.OPTS
@@ -38,8 +38,8 @@ class precharge_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/04_wordline_driver_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 import sys
 
 OPTS = globals.OPTS
@@ -41,8 +41,8 @@ class wordline_driver_test(unittest.TestCase):
         tx.sp_write(tempspice)
         tx.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(tx.name, tempgds))
+        self.assertFalse(verify.run_drc(tx.name, tempgds))
-        self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(tx.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/05_bitcell_array_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -40,8 +40,8 @@ class array_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/06_hierarchical_decoder_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -55,8 +55,8 @@ class hierarchical_decoder_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/06_hierarchical_predecode2x4_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -38,8 +38,8 @@ class hierarchical_predecode2x4_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/06_hierarchical_predecode3x8_test.py

@@ -9,7 +9,7 @@ import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
 import debug
-import calibre
+import verify
 
 OPTS = globals.OPTS
 
@@ -38,8 +38,8 @@ class hierarchical_predecode3x8_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/07_single_level_column_mux_array_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 
 class single_level_column_mux_test(unittest.TestCase):
@@ -45,8 +44,8 @@ class single_level_column_mux_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/08_precharge_array_test.py

@@ -8,10 +8,10 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
 
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 08_precharge_test")
 
@@ -39,8 +39,8 @@ class precharge_test(unittest.TestCase):
         pc.sp_write(tempspice)
         pc.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(pc.name, tempgds))
+        self.assertFalse(verify.run_drc(pc.name, tempgds))
-        self.assertFalse(calibre.run_lvs(pc.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(pc.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/09_sense_amp_array_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 09_sense_amp_test")
 
@@ -43,8 +42,8 @@ class sense_amp_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/10_write_driver_array_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 10_write_driver_test")
 
@@ -42,8 +41,8 @@ class write_driver_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/11_ms_flop_array_test.py

@@ -8,12 +8,11 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
 import importlib
 
-OPTS = globals.get_opts()
-
 #@unittest.skip("SKIPPING 20_sram_test")
 
 
@@ -43,8 +42,8 @@ class dff_array_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/12_tri_gate_array_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 
 class tri_gate_array_test(unittest.TestCase):
@@ -41,8 +40,8 @@ class tri_gate_array_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/13_replica_bitline_test.py

@@ -8,12 +8,11 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
 import importlib
 
-OPTS = globals.get_opts()
-
 #@unittest.skip("SKIPPING 14_delay_chain_test")
 
 
@@ -40,8 +39,8 @@ class replica_bitline_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/14_delay_chain_test.py

@@ -8,14 +8,11 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 14_delay_chain_test")
-
-
 class delay_chain_test(unittest.TestCase):
 
     def runTest(self):
@@ -39,8 +36,8 @@ class delay_chain_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/16_control_logic_test.py

@@ -8,11 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
-
 
 class control_logic_test(unittest.TestCase):
 
@@ -38,8 +36,8 @@ class control_logic_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/19_multi_bank_test.py

@@ -8,12 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
-
-
 
 class multi_bank_test(unittest.TestCase):
 
@@ -51,8 +48,8 @@ class multi_bank_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/19_single_bank_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 20_sram_test")
 
@@ -52,8 +51,8 @@ class single_bank_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/20_sram_1bank_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 20_sram_test")
 
@@ -51,9 +50,9 @@ class sram_1bank_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
-        #self.assertFalse(calibre.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
+        #self.assertFalse(verify.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/20_sram_2bank_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 20_sram_test")
 
@@ -51,9 +50,9 @@ class sram_2bank_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
-        #self.assertFalse(calibre.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
+        #self.assertFalse(verify.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/20_sram_4bank_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 20_sram_test")
 
@@ -51,9 +50,9 @@ class sram_4bank_test(unittest.TestCase):
         a.sp_write(tempspice)
         a.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(a.name, tempgds))
+        self.assertFalse(verify.run_drc(a.name, tempgds))
-        self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(a.name, tempgds, tempspice))
-        #self.assertFalse(calibre.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
+        #self.assertFalse(verify.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
 
         os.remove(tempspice)
         os.remove(tempgds)

compiler/tests/21_hspice_delay_test.py

@@ -8,10 +8,9 @@ from testutils import header,isclose
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 21_timing_sram_test")
 
@@ -24,8 +23,11 @@ class timing_sram_test(unittest.TestCase):
         OPTS.check_lvsdrc = False
         OPTS.spice_version="hspice"
         OPTS.analytical_delay = False
-        globals.set_spice()
+        # This is a hack to reload the characterizer __init__ with the spice version
-        
+        import characterizer
+        reload(characterizer)
+        from characterizer import delay
+
         import sram
 
         debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
@@ -36,8 +38,6 @@ class timing_sram_test(unittest.TestCase):
 
         OPTS.check_lvsdrc = True
 
-        import delay
-
         tempspice = OPTS.openram_temp + "temp.sp"
         s.sp_write(tempspice)
 
@@ -79,18 +79,15 @@ class timing_sram_test(unittest.TestCase):
         for k in data.keys():
             if type(data[k])==list:
                 for i in range(len(data[k])):
-                    self.assertTrue(isclose(data[k][i],golden_data[k][i]))
+                    self.assertTrue(isclose(data[k][i],golden_data[k][i],0.10))
             else:
-                self.assertTrue(isclose(data[k],golden_data[k]))
+                self.assertTrue(isclose(data[k],golden_data[k],0.10))
 
                 
         # reset these options
         OPTS.check_lvsdrc = True
-        OPTS.spice_version="hspice"
         OPTS.analytical_delay = True
-        globals.set_spice()
+        reload(characterizer)
-
-        os.remove(tempspice)
 
         globals.end_openram()
         

compiler/tests/21_hspice_setuphold_test.py

@@ -8,10 +8,9 @@ from testutils import header,isclose
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 21_timing_sram_test")
 
@@ -24,14 +23,15 @@ class timing_setup_test(unittest.TestCase):
         # we will manually run lvs/drc
         OPTS.check_lvsdrc = False
         OPTS.spice_version="hspice"
-        globals.set_spice()
+        OPTS.analytical_delay = False
+        import characterizer
+        reload(characterizer)
+        from characterizer import setup_hold
 
         import sram
         import tech
         slews = [tech.spice["rise_time"]*2]
         
-        import setup_hold
-        
         sh = setup_hold.setup_hold()
         data = sh.analyze(slews,slews)
 
@@ -54,11 +54,13 @@ class timing_setup_test(unittest.TestCase):
         for k in data.keys():
             if type(data[k])==list:
                 for i in range(len(data[k])):
-                    self.assertTrue(isclose(data[k][i],golden_data[k][i]))
+                    self.assertTrue(isclose(data[k][i],golden_data[k][i],0.10))
             else:
-                self.assertTrue(isclose(data[k],golden_data[k]))
+                self.assertTrue(isclose(data[k],golden_data[k],0.10))
 
         OPTS.check_lvsdrc = True
+        OPTS.analytical_delay = True
+        reload(characterizer)
         globals.end_openram()
         
 # instantiate a copdsay of the class to actually run the test

compiler/tests/21_ngspice_delay_test.py

@@ -8,10 +8,9 @@ from testutils import header,isclose
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 21_ngspice_delay_test")
 class timing_sram_test(unittest.TestCase):
@@ -22,8 +21,11 @@ class timing_sram_test(unittest.TestCase):
         OPTS.check_lvsdrc = False
         OPTS.spice_version="ngspice"
         OPTS.analytical_delay = False
-        globals.set_spice()
+        # This is a hack to reload the characterizer __init__ with the spice version
-        
+        import characterizer
+        reload(characterizer)
+        from characterizer import delay
+
         import sram
 
         debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
@@ -32,8 +34,6 @@ class timing_sram_test(unittest.TestCase):
                       num_banks=OPTS.config.num_banks,
                       name="sram1")
 
-        import delay
-
         tempspice = OPTS.openram_temp + "temp.sp"
         s.sp_write(tempspice)
 
@@ -76,17 +76,15 @@ class timing_sram_test(unittest.TestCase):
         for k in data.keys():
             if type(data[k])==list:
                 for i in range(len(data[k])):
-                    self.assertTrue(isclose(data[k][i],golden_data[k][i]))
+                    self.assertTrue(isclose(data[k][i],golden_data[k][i],0.10))
             else:
-                self.assertTrue(isclose(data[k],golden_data[k]))
+                self.assertTrue(isclose(data[k],golden_data[k]),0.10)
 
         # reset these options
         OPTS.check_lvsdrc = True
         OPTS.spice_version="hspice"
         OPTS.analytical_delay = True
-        globals.set_spice()
+        reload(characterizer)
-
-        os.remove(tempspice)
 
         globals.end_openram()
 

compiler/tests/21_ngspice_setuphold_test.py

@@ -8,10 +8,9 @@ from testutils import header,isclose
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 21_timing_sram_test")
 
@@ -20,17 +19,20 @@ class timing_setup_test(unittest.TestCase):
 
     def runTest(self):
         globals.init_openram("config_20_{0}".format(OPTS.tech_name))
+
         # we will manually run lvs/drc
         OPTS.check_lvsdrc = False
         OPTS.spice_version="ngspice"
-        globals.set_spice()
+        OPTS.analytical_delay = False
+        # This is a hack to reload the characterizer __init__ with the spice version
+        import characterizer
+        reload(characterizer)
+        from characterizer import setup_hold
         
         import sram
         import tech
         slews = [tech.spice["rise_time"]*2]
         
-        import setup_hold
-        
         sh = setup_hold.setup_hold()
         data = sh.analyze(slews,slews)
 
@@ -53,14 +55,16 @@ class timing_setup_test(unittest.TestCase):
         for k in data.keys():
             if type(data[k])==list:
                 for i in range(len(data[k])):
-                    self.assertTrue(isclose(data[k][i],golden_data[k][i]))
+                    self.assertTrue(isclose(data[k][i],golden_data[k][i],0.10))
             else:
-                self.assertTrue(isclose(data[k],golden_data[k]))
+                self.assertTrue(isclose(data[k],golden_data[k],0.10))
 
         # reset these options
         OPTS.check_lvsdrc = True
         OPTS.spice_version="hspice"
-        globals.set_spice()
+        OPTS.analytical_delay = True
+        reload(characterizer)
+
         globals.end_openram()
 
 # instantiate a copdsay of the class to actually run the test

compiler/tests/22_pex_func_test_with_pinv.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 
 @unittest.skip("SKIPPING 22_sram_func_test")
@@ -47,9 +46,9 @@ class sram_func_test(unittest.TestCase):
         s.sp_write(tempspice)
         s.gds_write(tempgds)
 
-        self.assertFalse(calibre.run_drc(s.name, tempgds))
+        self.assertFalse(verify.run_drc(s.name, tempgds))
-        self.assertFalse(calibre.run_lvs(s.name, tempgds, tempspice))
+        self.assertFalse(verify.run_lvs(s.name, tempgds, tempspice))
-        self.assertFalse(calibre.run_pex(s.name, tempgds,
+        self.assertFalse(verify.run_pex(s.name, tempgds,
                                          tempspice, output=OPTS.openram_temp + "temp_pex.sp"))
 
         import sp_file

compiler/tests/22_sram_func_test.py

@@ -8,10 +8,9 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 #@unittest.skip("SKIPPING 21_timing_sram_test")
 
@@ -19,10 +18,16 @@ OPTS = globals.get_opts()
 class sram_func_test(unittest.TestCase):
 
     def runTest(self):
-        OPTS.analytical_delay = False
         globals.init_openram("config_20_{0}".format(OPTS.tech_name))
+
         # we will manually run lvs/drc
         OPTS.check_lvsdrc = False
+        OPTS.spice_version="hspice"
+        OPTS.analytical_delay = False
+        import characterizer
+        reload(characterizer)
+        from characterizer import delay
+
         import sram
 
         debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
@@ -32,7 +37,6 @@ class sram_func_test(unittest.TestCase):
                       name="sram_func_test")
 
         OPTS.check_lvsdrc = True
-        import delay
 
         tempspice = OPTS.openram_temp + "temp.sp"
         s.sp_write(tempspice)
@@ -52,6 +56,7 @@ class sram_func_test(unittest.TestCase):
 
         os.remove(tempspice)
         OPTS.analytical_delay = True
+        reload(characterizer)
         globals.end_openram()
         
 # instantiate a copdsay of the class to actually run the test

compiler/tests/23_lib_sram_model_test.py

@@ -8,11 +8,9 @@ from testutils import header,isapproxdiff
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
-
 
 class lib_test(unittest.TestCase):
 
@@ -22,7 +20,7 @@ class lib_test(unittest.TestCase):
         OPTS.check_lvsdrc = False
 
         import sram
-        import lib
+        from characterizer import lib
 
         debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
         s = sram.sram(word_size=2,
@@ -43,8 +41,6 @@ class lib_test(unittest.TestCase):
         # Randomly decided 1% difference between spice simulators is ok.
         self.assertEqual(isapproxdiff(libname,golden,0.01),True)
 
-        os.system("rm {0}".format(libname))
-
         globals.end_openram()
 
 # instantiate a copdsay of the class to actually run the test

compiler/tests/23_lib_sram_prune_test.py

@@ -8,22 +8,23 @@ from testutils import header,isapproxdiff
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
-
 
 class lib_test(unittest.TestCase):
 
     def runTest(self):
-        OPTS.analytical_delay = False
         globals.init_openram("config_20_{0}".format(OPTS.tech_name))
         # we will manually run lvs/drc
         OPTS.check_lvsdrc = False
+        OPTS.spice_version="hspice"
+        OPTS.analytical_delay = False
+        import characterizer
+        reload(characterizer)
+        from characterizer import lib
 
         import sram
-        import lib
 
         debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
         s = sram.sram(word_size=2,
@@ -44,8 +45,8 @@ class lib_test(unittest.TestCase):
         # 15% worked in freepdk, but scmos needed 20%
         self.assertEqual(isapproxdiff(libname,golden,0.20),True)
 
-        os.system("rm {0}".format(libname))
         OPTS.analytical_delay = True
+        reload(characterizer)
         globals.end_openram()
         
 # instantiate a copdsay of the class to actually run the test

compiler/tests/23_lib_sram_test.py

@@ -8,23 +8,23 @@ from testutils import header,isapproxdiff
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
-
 
 class lib_test(unittest.TestCase):
 
     def runTest(self):
-        OPTS.analytical_delay = False
-        OPTS.trim_netlist = False
         globals.init_openram("config_20_{0}".format(OPTS.tech_name))
         # we will manually run lvs/drc
         OPTS.check_lvsdrc = False
+        OPTS.analytical_delay = False
+        OPTS.trim_netlist = False
+        import characterizer
+        reload(characterizer)
+        from characterizer import lib
 
         import sram
-        import lib
 
         debug.info(1, "Testing timing for sample 2 bit, 16 words SRAM with 1 bank")
         s = sram.sram(word_size=2,
@@ -45,9 +45,9 @@ class lib_test(unittest.TestCase):
         # Randomly decided 10% difference between spice simulators is ok.
         self.assertEqual(isapproxdiff(libname,golden,0.10),True)
 
-        os.system("rm {0}".format(libname))
         OPTS.analytical_delay = True
         OPTS.trim_netlist = True
+        reload(characterizer)
         globals.end_openram()
         
 # instantiate a copdsay of the class to actually run the test

compiler/tests/24_lef_sram_test.py

@@ -8,10 +8,9 @@ from testutils import header,isdiff
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 
 class lef_test(unittest.TestCase):

compiler/tests/25_verilog_sram_test.py

@@ -8,10 +8,9 @@ from testutils import header,isdiff
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
-import calibre
+import verify
-
-OPTS = globals.get_opts()
 
 
 class verilog_test(unittest.TestCase):

compiler/tests/30_openram_test.py

@@ -10,13 +10,12 @@ from testutils import header
 import sys,os
 sys.path.append(os.path.join(sys.path[0],".."))
 import globals
+from globals import OPTS
 import debug
 import os
 import re
 import shutil
 
-OPTS = globals.get_opts()
-
 class openram_test(unittest.TestCase):
 
     def runTest(self):
@@ -73,7 +72,7 @@ class openram_test(unittest.TestCase):
 
         globals.end_openram()        
 
-# instantiate a copdsay of the class to actually run the test
+# instantiate a copy of the class to actually run the test
 if __name__ == "__main__":
     (OPTS, args) = globals.parse_args()
     del sys.argv[1:]

compiler/tests/config_20_freepdk45.py

@@ -5,7 +5,7 @@ num_banks = 1
 tech_name = "freepdk45"
 
 # Optional, will be over-ridden on command line.
-output_path = "/tmp/mysram"
+output_path = "/tmp/freepdk45_sram"
 output_name = "sram_2_16_1_freepdk45"
 
 decoder = "hierarchical_decoder"

compiler/tests/config_20_scn3me_subm.py

@@ -5,7 +5,7 @@ num_banks = 1
 tech_name = "scn3me_subm"
 
 # Optional, will be over-ridden on command line.
-output_path = "/tmp/mysram"
+output_path = "/tmp/scn3me_subm_mysram"
 output_name = "sram_2_16_1_scn3me_subm"
 
 decoder = "hierarchical_decoder"

compiler/tests/testutils.py

@@ -110,7 +110,6 @@ def header(filename, technology):
     print "|=========" + tst.center(60) + "=========|"
     print "|=========" + technology.center(60) + "=========|"
     print "|=========" + filename.center(60) + "=========|"
-    import globals
+    from  globals import OPTS
-    OPTS = globals.get_opts()
     print "|=========" + OPTS.openram_temp.center(60) + "=========|"
     print "|==============================================================================|"

compiler/verify/__init__.py

@@ -0,0 +1,60 @@
+"""
+This is a module that will import the correct DRC/LVS/PEX 
+module based on what tools are found. It is a layer of indirection
+to enable multiple verification tool support.
+
+Each DRC/LVS/PEX tool should implement the functions run_drc, run_lvs, and
+run_pex, repsectively. If there is an error, they should abort and report the errors.
+If not, OpenRAM will continue as if nothing happened!
+"""
+
+import os
+import debug
+from globals import OPTS,find_exe,get_tool
+
+
+debug.info(2,"Initializing verify...")
+
+if not OPTS.check_lvsdrc:
+    debug.info(1,"LVS/DRC/PEX disabled.")
+    drc_exe = None
+    lvs_exe = None
+    pex_exe = None
+else:
+    drc_exe = get_tool("DRC",["calibre","assura","magic"])
+    lvs_exe = get_tool("LVS",["calibre","assura","netgen"])
+    pex_exe = get_tool("PEX",["calibre","magic"])
+
+
+if drc_exe == None:
+    pass
+elif "calibre" in drc_exe:
+    from calibre import run_drc
+elif "assura" in drc_exe:
+    from assura import run_drc
+elif "magic" in drc_exe:
+    from magic import run_drc
+else:
+    debug.warning("Did not find a supported DRC tool.")
+
+if lvs_exe == None:
+    pass
+elif "calibre" in lvs_exe:
+    from calibre import run_lvs
+elif "assura" in lvs_exe:
+    from assura import run_lvs
+elif "netgen" in lvs_exe:
+    from magic import run_lvs
+else:
+    debug.warning("Did not find a supported LVS tool.")
+
+
+if pex_exe == None:
+    pass
+elif "calibre" in pex_exe:
+    from calibre import run_pex
+elif "magic" in pex_exe:
+    from magic import run_pex
+else:
+    debug.warning("Did not find a supported PEX tool.")
+    

compiler/verify/assura.py

@@ -0,0 +1,172 @@
+"""
+This is a DRC/LVS interface for Assura. It implements completely two
+functions: run_drc and run_lvs, that perform these functions in batch
+mode and will return true/false if the result passes. All of the setup
+(the rules, temp dirs, etc.) should be contained in this file.
+Replacing with another DRC/LVS tool involves rewriting this code to
+work properly. Porting to a new technology in Assura means pointing
+the code to the proper DRC and LVS rule files.
+
+LVS Notes:
+
+For some processes the FET models are sub-circuits.  Meaning, the
+first letter of their SPICE instantiation begins with 'X' not 'M'.
+The former confuses Assura, however, so to get these sub-circuit models
+to LVS properly, an empty sub-circuit must be inserted into the
+LVS SPICE netlist.  The sub-circuits are pointed to using the
+drc["lvs_subcircuits"] variable, and additional options must be
+inserted in the runset.
+"""
+
+
+import os
+import re
+import time
+import debug
+from globals import OPTS
+
+def run_drc(name, gds_name):
+    """Run DRC check on a given top-level name which is
+       implemented in gds_name."""
+
+    from tech import drc
+    drc_rules = drc["drc_rules"]
+    drc_runset = OPTS.openram_temp + name + ".rsf"
+    drc_log_file = "{0}{1}.log".format(OPTS.openram_temp, name)
+
+    # write the runset file
+    # the runset file contains all the options to run Assura
+    # different processes may require different options
+    f = open(drc_runset, "w")
+    f.write("avParameters(\n")
+    f.write("  ?flagDotShapes t\n")
+    f.write("  ?flagMalformed t\n")
+    f.write("  ?flagPathNonManhattanSeg all\n")
+    f.write("  ?flagPathShortSegments endOnlySmart\n")
+    f.write("  ?maintain45 nil\n")
+    f.write("  ?combineNearCollinearEdges  nil\n")
+    f.write(")\n")
+    f.write("\n")
+    f.write("avParameters(\n")
+    f.write("  ?inputLayout ( \"gds2\" \"{}\" )\n".format(gds_name))
+    f.write("  ?cellName \"{}\"\n".format(name))
+    f.write("  ?workingDirectory \"{}\"\n".format(OPTS.openram_temp))
+    f.write("  ?rulesFile \"{}\"\n".format(drc_rules))
+    f.write("  ?set ( \"GridCheck\" )\n")
+    f.write("  ?avrpt t\n")
+    f.write(")\n")
+    f.close()
+
+    # run drc
+    cwd = os.getcwd()
+    os.chdir(OPTS.openram_temp)
+    cmd = "assura {0} 2> {1} 1> {2}".format(drc_runset, drc_log_file, drc_log_file)
+    debug.info(1, cmd)
+    os.system(cmd)
+    os.chdir(cwd)
+
+    # count and report errors
+    errors = 0
+    try:
+        f = open(OPTS.openram_temp+name+".err", "r")
+    except:
+        debug.error("Unable to retrieve DRC results file.",1)
+    results = f.readlines()
+    f.close()
+    for line in results:
+        if re.match("Rule No.", line):
+            if re.search("# INFO:", line) == None:
+               errors = errors + 1
+               debug.info(1, line)
+
+    if errors > 0:
+        debug.error("Errors: {}".format(errors))
+
+    return errors
+
+
+def run_lvs(name, gds_name, sp_name):
+    """Run LVS check on a given top-level name which is
+       implemented in gds_name and sp_name. """
+    from tech import drc
+    lvs_rules = drc["lvs_rules"]
+    lvs_runset = OPTS.openram_temp + name + ".rsf"
+    # The LVS compare rules must be defined in the tech file for Assura.
+    lvs_compare = drc["lvs_compare"]
+    # Define the must-connect names for disconnected LVS nets for Assura
+    lvs_bindings = drc["lvs_bindings"]
+    lvs_log_file = "{0}{1}.log".format(OPTS.openram_temp, name)
+    # Needed when FET models are sub-circuits
+    if drc.has_key("lvs_subcircuits"):
+        lvs_sub_file = drc["lvs_subcircuits"]
+    else:
+        lvs_sub_file = ""
+
+    # write the runset file
+    # the runset file contains all the options to run Assura
+    # different processes may require different options
+    f = open(lvs_runset, "w")
+    f.write("avParameters(\n")
+    f.write("  ?inputLayout ( \"gds2\" \"{}\" )\n".format(gds_name))
+    f.write("  ?cellName \"{}\"\n".format(name))
+    f.write("  ?workingDirectory \"{}\"\n".format(OPTS.openram_temp))
+    f.write("  ?rulesFile \"{}\"\n".format(lvs_rules))
+    f.write("  ?autoGrid nil\n")
+    f.write("  ?avrpt t\n")
+    # The below options vary greatly between processes and cell-types
+    f.write("  ?set (\"NO_SUBC_IN_GRLOGIC\")\n")
+    f.write(")\n")
+    f.write("\n")
+    c = open(lvs_compare, "r")
+    lines = c.read()
+    c.close
+    f.write(lines)
+    f.write("\n")
+    f.write("avCompareRules(\n")
+    f.write("  schematic(\n")
+    # Needed when FET models are sub-circuits
+    if os.path.isfile(lvs_sub_file):
+        f.write("    genericDevice(emptySubckt)\n")
+        f.write("    netlist( spice \"{}\" )\n".format(lvs_sub_file))
+    f.write("    netlist( spice \"{}\" )\n".format(sp_name))
+    f.write("  )\n")
+    f.write("  layout(\n")
+    # Separate gnd shapes are sometimes not connected by metal, so this connects by name
+    # The use of this option is not recommended for final DRC
+    f.write("    joinNets( root \"gnd\" \"gnd*\" ) \n")
+    f.write("  )\n")
+    f.write("  bindingFile( \"{}\" )\n".format(lvs_bindings))
+    f.write(")\n")
+    f.write("\n")
+    f.write("avLVS()\n")
+    f.close()
+
+    # run lvs
+    cwd = os.getcwd()
+    os.chdir(OPTS.openram_temp)
+    cmd = "assura {0} 2> {1} 1> {2}".format(lvs_runset, lvs_log_file, lvs_log_file)
+    debug.info(1, cmd)
+    os.system(cmd)
+    os.chdir(cwd)
+
+    errors = 0
+    try:
+        f = open(OPTS.openram_temp+name+".csm", "r")
+    except:
+        debug.error("Unable to retrieve LVS results file.",1)
+    results = f.readlines()
+    f.close()
+    for line in results:
+        if re.search("errors", line):
+           errors = errors + 1
+           debug.info(1, line)
+        elif re.search("Schematic and Layout", line):
+           debug.info(1, line)
+
+    return errors
+
+
+def run_pex(name, gds_name, sp_name, output=None):
+    """Run pex on a given top-level name which is
+       implemented in gds_name and sp_name. """
+    debug.error("PEX extraction not implemented with Assura.",-1)

compiler/verify/calibre.py

@@ -62,14 +62,13 @@ import os
 import re
 import time
 import debug
-import globals
+from globals import OPTS
 import subprocess
 
 
 def run_drc(name, gds_name):
     """Run DRC check on a given top-level name which is
        implemented in gds_name."""
-    OPTS = globals.get_opts()
 
     # the runset file contains all the options to run calibre
     from tech import drc
@@ -91,17 +90,18 @@ def run_drc(name, gds_name):
     # write the runset file
     f = open(OPTS.openram_temp + "drc_runset", "w")
     for k in sorted(drc_runset.iterkeys()):
-        f.write("*%s: %s\n" % (k, drc_runset[k]))
+        f.write("*{0}: {1}\n".format(k, drc_runset[k]))
     f.close()
 
     # run drc
     cwd = os.getcwd()
     os.chdir(OPTS.openram_temp)
-    errfile = "%s%s.drc.err" % (OPTS.openram_temp, name)
+    errfile = "{0}{1}.drc.err".format(OPTS.openram_temp, name)
-    outfile = "%s%s.drc.out" % (OPTS.openram_temp, name)
+    outfile = "{0}{1}.drc.out".format(OPTS.openram_temp, name)
 
-    cmd = "{0} -gui -drc {1}drc_runset -batch 2> {2} 1> {3}".format(
+    cmd = "calibre -gui -drc {0}drc_runset -batch 2> {1} 1> {2}".format(OPTS.openram_temp,
-        OPTS.calibre_exe, OPTS.openram_temp, errfile, outfile)
+                                                                        errfile,
+                                                                        outfile)
     debug.info(1, cmd)
     os.system(cmd)
     os.chdir(cwd)
@@ -124,19 +124,21 @@ def run_drc(name, gds_name):
 
     # always display this summary
     if errors > 0:
-        debug.error("%-25s\tGeometries: %d\tChecks: %d\tErrors: %d" %
+        debug.error("{0}\tGeometries: {1}\tChecks: {2}\tErrors: {3}".format(name, 
-                    (name, geometries, rulechecks, errors))
+                                                                            geometries,
+                                                                            rulechecks,
+                                                                            errors))
     else:
-        debug.info(1, "%-25s\tGeometries: %d\tChecks: %d\tErrors: %d" %
+        debug.info(1, "{0}\tGeometries: {1}\tChecks: {2}\tErrors: {3}".format(name, 
-                   (name, geometries, rulechecks, errors))
+                                                                              geometries,
-
+                                                                              rulechecks,
+                                                                              errors))
     return errors
 
 
 def run_lvs(name, gds_name, sp_name):
     """Run LVS check on a given top-level name which is
        implemented in gds_name and sp_name. """
-    OPTS = globals.get_opts()
     from tech import drc
     lvs_rules = drc["lvs_rules"]
     lvs_runset = {
@@ -166,18 +168,19 @@ def run_lvs(name, gds_name, sp_name):
     # write the runset file
     f = open(OPTS.openram_temp + "lvs_runset", "w")
     for k in sorted(lvs_runset.iterkeys()):
-        f.write("*%s: %s\n" % (k, lvs_runset[k]))
+        f.write("*{0}: {1}\n".format(k, lvs_runset[k]))
     f.close()
 
     # run LVS
     cwd = os.getcwd()
     os.chdir(OPTS.openram_temp)
-    errfile = "%s%s.lvs.err" % (OPTS.openram_temp, name)
+    errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, name)
-    outfile = "%s%s.lvs.out" % (OPTS.openram_temp, name)
+    outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, name)
 
-    cmd = "calibre -gui -lvs %slvs_runset -batch 2> %s 1> %s" % (
+    cmd = "calibre -gui -lvs {0}lvs_runset -batch 2> {1} 1> {2}".format(OPTS.openram_temp,
-        OPTS.openram_temp, errfile, outfile)
+                                                                        errfile,
-    debug.info(2, cmd)
+                                                                        outfile)
+    debug.info(1, cmd)
     os.system(cmd)
     os.chdir(cwd)
 
@@ -244,7 +247,6 @@ def run_lvs(name, gds_name, sp_name):
 def run_pex(name, gds_name, sp_name, output=None):
     """Run pex on a given top-level name which is
        implemented in gds_name and sp_name. """
-    OPTS = globals.get_opts()
     from tech import drc
     if output == None:
         output = name + ".pex.netlist"
@@ -283,10 +285,9 @@ def run_pex(name, gds_name, sp_name, output=None):
     errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
     outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
 
-    cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.calibre_exe,
+    cmd = "calibre -gui -pex {0}pex_runset -batch 2> {1} 1> {2}".format(OPTS.openram_temp,
-                                                                    OPTS.openram_temp,
+                                                                        errfile,
-                                                                    errfile,
+                                                                        outfile)
-                                                                    outfile)
     debug.info(2, cmd)
     os.system(cmd)
     os.chdir(cwd)

compiler/verify/magic.py

@@ -0,0 +1,320 @@
+"""
+This is a DRC/LVS/PEX interface file for magic + netgen. 
+
+This assumes you have the SCMOS magic rules installed. Get these from:
+ftp://ftp.mosis.edu/pub/sondeen/magic/new/beta/current.tar.gz
+and install them in:
+cd /opt/local/lib/magic/sys
+tar zxvf current.tar.gz
+ln -s 2001a current
+
+1. magic can perform drc with the following:
+#!/bin/sh
+magic -dnull -noconsole << EOF
+tech load SCN3ME_SUBM.30
+gds rescale false
+gds polygon subcell true
+gds warning default
+gds read $1
+drc count
+drc why
+quit -noprompt
+EOF
+
+2. magic can perform extraction with the following:
+#!/bin/sh
+rm -f $1.ext
+rm -f $1.spice
+magic -dnull -noconsole << EOF
+tech load SCN3ME_SUBM.30
+gds rescale false
+gds polygon subcell true
+gds warning default
+gds read $1
+extract
+ext2spice scale off
+ext2spice
+quit -noprompt
+EOF
+
+3. netgen can perform LVS with:
+#!/bin/sh
+netgen -noconsole <<EOF
+readnet $1.spice
+readnet $1.sp
+ignore class c
+permute transistors
+compare hierarchical $1.spice {$1.sp $1}
+permute
+run converge
+EOF
+
+"""
+
+
+import os
+import re
+import time
+import debug
+from globals import OPTS
+import subprocess
+
+
+def run_drc(name, gds_name):
+    """Run DRC check on a given top-level name which is
+       implemented in gds_name."""
+
+    debug.warning("DRC using magic not implemented.")
+    return 0
+
+    # the runset file contains all the options to run drc
+    from tech import drc
+    drc_rules = drc["drc_rules"]
+    drc_runset = {
+        'drcRulesFile': drc_rules,
+        'drcRunDir': OPTS.openram_temp,
+        'drcLayoutPaths': gds_name,
+        'drcLayoutPrimary': name,
+        'drcLayoutSystem': 'GDSII',
+        'drcResultsformat': 'ASCII',
+        'drcResultsFile': OPTS.openram_temp + name + ".drc.results",
+        'drcSummaryFile': OPTS.openram_temp + name + ".drc.summary",
+        'cmnFDILayerMapFile': drc["layer_map"],
+        'cmnFDIUseLayerMap': 1
+    }
+
+    # write the runset file
+    f = open(OPTS.openram_temp + "drc_runset", "w")
+    for k in sorted(drc_runset.iterkeys()):
+        f.write("*{0}: {1}\n".format(k, drc_runset[k]))
+    f.close()
+
+    # run drc
+    cwd = os.getcwd()
+    os.chdir(OPTS.openram_temp)
+    errfile = "{0}{1}.drc.err".format(OPTS.openram_temp, name)
+    outfile = "{0}{1}.drc.out".format(OPTS.openram_temp, name)
+
+    cmd = "{0} -gui -drc {1}drc_runset -batch 2> {2} 1> {3}".format(OPTS.drc_exe,
+                                                                    OPTS.openram_temp,
+                                                                    errfile,
+                                                                    outfile)
+    debug.info(1, cmd)
+    os.system(cmd)
+    os.chdir(cwd)
+
+    # check the result for these lines in the summary:
+    # TOTAL Original Layer Geometries: 106 (157)
+    # TOTAL DRC RuleChecks Executed:   156
+    # TOTAL DRC Results Generated:     0 (0)
+    try:
+        f = open(drc_runset['drcSummaryFile'], "r")
+    except:
+        debug.error("Unable to retrieve DRC results file. Is magic set up?",1)
+    results = f.readlines()
+    f.close()
+    # those lines should be the last 3
+    results = results[-3:]
+    geometries = int(re.split("\W+", results[0])[5])
+    rulechecks = int(re.split("\W+", results[1])[4])
+    errors = int(re.split("\W+", results[2])[5])
+
+    # always display this summary
+    if errors > 0:
+        debug.error("{0}\tGeometries: {1}\tChecks: {2}\tErrors: {3}".format(name, 
+                                                                            geometries,
+                                                                            rulechecks,
+                                                                            errors))
+    else:
+        debug.info(1, "{0}\tGeometries: {1}\tChecks: {2}\tErrors: {3}".format(name, 
+                                                                              geometries,
+                                                                              rulechecks,
+                                                                              errors))
+
+    return errors
+
+
+def run_lvs(name, gds_name, sp_name):
+    """Run LVS check on a given top-level name which is
+       implemented in gds_name and sp_name. """
+
+    debug.warning("LVS using magic+netgen not implemented.")
+    return 0
+    
+    from tech import drc
+    lvs_rules = drc["lvs_rules"]
+    lvs_runset = {
+        'lvsRulesFile': lvs_rules,
+        'lvsRunDir': OPTS.openram_temp,
+        'lvsLayoutPaths': gds_name,
+        'lvsLayoutPrimary': name,
+        'lvsSourcePath': sp_name,
+        'lvsSourcePrimary': name,
+        'lvsSourceSystem': 'SPICE',
+        'lvsSpiceFile': OPTS.openram_temp + "extracted.sp",
+        'lvsPowerNames': 'vdd',
+        'lvsGroundNames': 'gnd',
+        'lvsIncludeSVRFCmds': 1,
+        'lvsSVRFCmds': '{VIRTUAL CONNECT NAME VDD? GND? ?}',
+        'lvsIgnorePorts': 1,
+        'lvsERCDatabase': OPTS.openram_temp + name + ".erc.results",
+        'lvsERCSummaryFile': OPTS.openram_temp + name + ".erc.summary",
+        'lvsReportFile': OPTS.openram_temp + name + ".lvs.report",
+        'lvsMaskDBFile': OPTS.openram_temp + name + ".maskdb",
+        'cmnFDILayerMapFile': drc["layer_map"],
+        'cmnFDIUseLayerMap': 1,
+        'cmnVConnectNames': 'vdd, gnd',
+        #'cmnVConnectNamesState' : 'ALL', #connects all nets with the same name
+    }
+
+    # write the runset file
+    f = open(OPTS.openram_temp + "lvs_runset", "w")
+    for k in sorted(lvs_runset.iterkeys()):
+        f.write("*%s: %s\n" % (k, lvs_runset[k]))
+    f.close()
+
+    # run LVS
+    cwd = os.getcwd()
+    os.chdir(OPTS.openram_temp)
+    errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, name)
+    outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, name)
+
+    cmd = "{0} -gui -lvs {1}lvs_runset -batch 2> {2} 1> {3}".format(OPTS.lvs_exe,
+                                                                    OPTS.openram_temp,
+                                                                    errfile,
+                                                                    outfile)
+    debug.info(1, cmd)
+    os.system(cmd)
+    os.chdir(cwd)
+
+    # check the result for these lines in the summary:
+    f = open(lvs_runset['lvsReportFile'], "r")
+    results = f.readlines()
+    f.close()
+
+    # NOT COMPARED
+    # CORRECT
+    # INCORRECT
+    test = re.compile("#     CORRECT     #")
+    correct = filter(test.search, results)
+    test = re.compile("NOT COMPARED")
+    notcompared = filter(test.search, results)
+    test = re.compile("#     INCORRECT     #")
+    incorrect = filter(test.search, results)
+
+    # Errors begin with "Error:"
+    test = re.compile("\s+Error:")
+    errors = filter(test.search, results)
+    for e in errors:
+        debug.error(e.strip("\n"))
+
+    summary_errors = len(notcompared) + len(incorrect) + len(errors)
+
+    # also check the extraction summary file
+    f = open(lvs_runset['lvsReportFile'] + ".ext", "r")
+    results = f.readlines()
+    f.close()
+
+    test = re.compile("ERROR:")
+    exterrors = filter(test.search, results)
+    for e in exterrors:
+        debug.error(e.strip("\n"))
+
+    test = re.compile("WARNING:")
+    extwarnings = filter(test.search, results)
+    for e in extwarnings:
+        debug.warning(e.strip("\n"))
+
+    # MRG - 9/26/17 - Change this to exclude warnings because of
+    # multiple labels on different pins in column mux.
+    ext_errors = len(exterrors)
+    ext_warnings = len(extwarnings) 
+
+    # also check the output file
+    f = open(outfile, "r")
+    results = f.readlines()
+    f.close()
+
+    # Errors begin with "ERROR:"
+    test = re.compile("ERROR:")
+    stdouterrors = filter(test.search, results)
+    for e in stdouterrors:
+        debug.error(e.strip("\n"))
+
+    out_errors = len(stdouterrors)
+
+    total_errors = summary_errors + out_errors + ext_errors
+    return total_errors
+
+
+def run_pex(name, gds_name, sp_name, output=None):
+    """Run pex on a given top-level name which is
+       implemented in gds_name and sp_name. """
+
+    debug.warning("PEX using magic not implemented.")
+    return 0
+
+    from tech import drc
+    if output == None:
+        output = name + ".pex.netlist"
+
+    # check if lvs report has been done
+    # if not run drc and lvs
+    if not os.path.isfile(name + ".lvs.report"):
+        run_drc(name, gds_name)
+        run_lvs(name, gds_name, sp_name)
+
+    pex_rules = drc["xrc_rules"]
+    pex_runset = {
+        'pexRulesFile': pex_rules,
+        'pexRunDir': OPTS.openram_temp,
+        'pexLayoutPaths': gds_name,
+        'pexLayoutPrimary': name,
+        #'pexSourcePath' : OPTS.openram_temp+"extracted.sp",
+        'pexSourcePath': sp_name,
+        'pexSourcePrimary': name,
+        'pexReportFile': name + ".lvs.report",
+        'pexPexNetlistFile': output,
+        'pexPexReportFile': name + ".pex.report",
+        'pexMaskDBFile': name + ".maskdb",
+        'cmnFDIDEFLayoutPath': name + ".def",
+    }
+
+    # write the runset file
+    f = open(OPTS.openram_temp + "pex_runset", "w")
+    for k in sorted(pex_runset.iterkeys()):
+        f.write("*{0}: {1}\n".format(k, pex_runset[k]))
+    f.close()
+
+    # run pex
+    cwd = os.getcwd()
+    os.chdir(OPTS.openram_temp)
+    errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
+    outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
+
+    cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.pex_exe,
+                                                                    OPTS.openram_temp,
+                                                                    errfile,
+                                                                    outfile)
+    debug.info(2, cmd)
+    os.system(cmd)
+    os.chdir(cwd)
+
+    # also check the output file
+    f = open(outfile, "r")
+    results = f.readlines()
+    f.close()
+
+    # Errors begin with "ERROR:"
+    test = re.compile("ERROR:")
+    stdouterrors = filter(test.search, results)
+    for e in stdouterrors:
+        debug.error(e.strip("\n"))
+
+    out_errors = len(stdouterrors)
+
+    assert(os.path.isfile(output))
+    #correct_port(name, output, sp_name)
+
+    return out_errors
+

technology/freepdk45/tech/tech.py

@@ -1,7 +1,7 @@
 import os
 
 """
-File containing the process technology parameters.
+File containing the process technology parameters for FreePDK 45nm.
 """
 
 info = {}
@@ -17,9 +17,9 @@ GDS["unit"] = (0.0005,1e-9)
 # default label zoom
 GDS["zoom"] = 0.05
 
-#####################################################################################################
+###################################################
-##GDS Layer Map######################################################################################
+##GDS Layer Map
-#####################################################################################################
+###################################################
 
 # create the GDS layer map
 # FIXME: parse the gds layer map from the cadence map?
@@ -56,13 +56,13 @@ layer["metal10"] = 29
 layer["text"]    = 239
 layer["boundary"]= 239
 
-#####################################################################################################
+###################################################
-##END GDS Layer Map##################################################################################
+##END GDS Layer Map
-#####################################################################################################
+###################################################
 
-#####################################################################################################
+###################################################
-##DRC/LVS Rules Setup################################################################################
+##DRC/LVS Rules Setup
-#####################################################################################################
+###################################################
 
 #technology parameter
 parameter={}
@@ -243,13 +243,13 @@ drc["metal10_to_metal10"] = 0.14
 drc["metal10_extend_via9"] = 0
 drc["metal10_enclosure_via9"] = 0
 
-#####################################################################################################
+###################################################
-##END DRC/LVS Rules##################################################################################
+##END DRC/LVS Rules
-#####################################################################################################
+###################################################
 
-#####################################################################################################
+###################################################
-##Spice Simulation Parameters########################################################################
+##Spice Simulation Parameters
-#####################################################################################################
+###################################################
 
 #spice info
 spice = {}
@@ -298,3 +298,9 @@ spice["msflop_setup"] = 9        # DFF setup time in ps
 spice["msflop_hold"] = 1         # DFF hold time in ps
 spice["msflop_delay"] = 20.5     # DFF Clk-to-q delay in ps
 spice["msflop_slew"] = 13.1      # DFF output slew in ps w/ no load
+
+
+###################################################
+##END Spice Simulation Parameters
+###################################################
+

technology/scn3me_subm/tech/tech.py

@@ -1,8 +1,9 @@
 import os
 
 """
-Class containing the process technology parameters.
+File containing the process technology parameters for SCMOS 3me, subm, 180nm.
 """
+
 info={}
 info["name"]="scn3me_subm"
 info["body_tie_down"] = 0
@@ -16,9 +17,10 @@ GDS["unit"]=(0.001,1e-6)
 # default label zoom
 GDS["zoom"] = 0.5
 
-#####################################################################################################
+
-##GDS Layer Map######################################################################################
+###################################################
-#####################################################################################################
+##GDS Layer Map
+###################################################
 
 # create the GDS layer map
 layer={} 
@@ -41,13 +43,13 @@ layer["metal3"]         = 62
 layer["text"]           = 83 
 layer["boundary"]       = 83 
 
-#####################################################################################################
+###################################################
-##END GDS Layer Map##################################################################################
+##END GDS Layer Map
-#####################################################################################################
+###################################################
 
-#####################################################################################################
+###################################################
-##DRC/LVS Rules Setup################################################################################
+##DRC/LVS Rules Setup
-#####################################################################################################
+###################################################
 
 #technology parameter
 parameter={}
@@ -163,13 +165,13 @@ drc["metal3_extend_via2"] = 0.6
 drc["metal3_enclosure_via2"] = 0.6 
 drc["minarea_metal3"] = 0
 
-#####################################################################################################
+###################################################
-##END DRC/LVS Rules##################################################################################
+##END DRC/LVS Rules
-#####################################################################################################
+###################################################
 
-#####################################################################################################
+###################################################
-##Spice Simulation Parameters########################################################################
+##Spice Simulation Parameters
-#####################################################################################################
+###################################################
 
 # spice model info
 spice={}
@@ -218,3 +220,7 @@ spice["msflop_hold"] = 1         # DFF hold time in ps
 spice["msflop_delay"] = 20.5     # DFF Clk-to-q delay in ps
 spice["msflop_slew"] = 13.1      # DFF output slew in ps w/ no load
 
+
+###################################################
+##END Spice Simulation Parameters
+###################################################