mirror of https://github.com/VLSIDA/OpenRAM.git
commit
74b806fa38
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@ -526,15 +526,15 @@ class lib:
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for (corner, lib_name) in zip(self.corners, self.lib_files):
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ports = ""
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if OPTS.num_rw_ports>0:
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ports += "{}_".format(OPTS.num_rw_ports)
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if OPTS.num_w_ports>0:
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ports += "{}_".format(OPTS.num_w_ports)
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if OPTS.num_r_ports>0:
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ports += "{}_".format(OPTS.num_r_ports)
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# ports = ""
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# if OPTS.num_rw_ports>0:
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# ports += "{}_".format(OPTS.num_rw_ports)
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# if OPTS.num_w_ports>0:
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# ports += "{}_".format(OPTS.num_w_ports)
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# if OPTS.num_r_ports>0:
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# ports += "{}_".format(OPTS.num_r_ports)
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datasheet.write("{0},{1},{2},{3},{4},{5},{6},{7},{8},{9},{10},{11},{12}".format("sram_{0}_{1}_{2}{3}".format(OPTS.word_size, OPTS.num_words, ports, OPTS.tech_name),
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datasheet.write("{0},{1},{2},{3},{4},{5},{6},{7},{8},{9},{10},{11},{12},{13}".format("sram_{0}_{1}_{2}".format(OPTS.word_size, OPTS.num_words, OPTS.tech_name),
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OPTS.num_words,
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OPTS.num_banks,
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OPTS.num_rw_ports,
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@ -546,7 +546,8 @@ class lib:
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self.corner[0],
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round_time(self.char_sram_results["min_period"]),
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self.out_dir,
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lib_name))
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lib_name,
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OPTS.word_size))
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datasheet.close()
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Binary file not shown.
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After Width: | Height: | Size: 26 KiB |
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@ -3,16 +3,21 @@ from operating_conditions import *
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from characterization_corners import *
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from deliverables import *
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from timing_and_current_data import *
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from in_out import *
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import os
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from globals import OPTS
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class datasheet():
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def __init__(self,identifier):
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self.io = []
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self.corners = []
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self.timing = []
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self.operating = []
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self.dlv = []
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self.name = identifier
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self.html = ""
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def generate_html(self):
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self.html = """<style>
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@ -40,16 +45,25 @@ class datasheet():
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color: white;
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}
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</style>"""
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>'+ self.name + '.html' + '</p>'
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# self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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# self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Ports and Configuration (DEBUG)</p>'
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self.html += in_out(self.io,table_id='data').__html__().replace('<','<').replace('"','"').replace('>',">")
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Operating Conditions</p>'
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self.html += operating_conditions(self.operating,table_id='data').__html__()
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self.html += '<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Timing and Current Data</p>'
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self.html += timing_and_current_data(self.timing,table_id='data').__html__()
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self.html += '<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Characterization Corners</p>'
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self.html += characterization_corners(self.corners,table_id='data').__html__()
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Deliverables</p>'
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self.html += deliverables(self.dlv,table_id='data').__html__().replace('<','<').replace('"','"').replace('>',">")
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>*Feature only supported with characterizer</p>'
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self.html +='<img src=' + os.path.abspath(os.environ.get("OPENRAM_HOME")) + '/datasheet/assets/vlsi_logo.png alt="VLSIDA" />'
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@ -8,17 +8,24 @@ Locate all timing elements in .lib
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Diagram generation
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Improve css
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"""
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import os, math
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import optparse
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from flask_table import *
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import csv
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import debug
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from globals import OPTS
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from deliverables import *
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from operating_conditions import *
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from timing_and_current_data import *
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from characterization_corners import *
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from datasheet import *
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if OPTS.datasheet_gen:
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import flask_table
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import os, math
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import optparse
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import csv
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from deliverables import *
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from operating_conditions import *
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from timing_and_current_data import *
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from characterization_corners import *
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from datasheet import *
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from in_out import *
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else:
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debug.warning("Python library flask_table not found. Skipping html datasheet generation. This can be installed with pip install flask-table.")
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def process_name(corner):
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if corner == "TT":
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@ -43,12 +50,13 @@ def parse_file(f,pages):
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NUM_W_PORTS = row[4]
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NUM_R_PORTS = row[5]
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TECH_NAME = row[6]
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TEMP = row[7]
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VOLT = row[8]
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TEMP = row[8]
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VOLT = row[7]
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PROC = row[9]
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MIN_PERIOD = row[10]
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OUT_DIR = row[11]
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LIB_NAME = row[12]
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WORD_SIZE = row[13]
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for sheet in pages:
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@ -95,39 +103,55 @@ def parse_file(f,pages):
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new_sheet.operating.append(operating_conditions_item('Power supply (VDD) range',VOLT,VOLT,VOLT,'Volts'))
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new_sheet.operating.append(operating_conditions_item('Operating Temperature',TEMP,TEMP,TEMP,'Celsius'))
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try:
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)','','',str(math.floor(1000/float(MIN_PERIOD))),'MHz'))
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)*','','',str(math.floor(1000/float(MIN_PERIOD))),'MHz'))
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except Exception:
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)','','',"unknown",'MHz')) #analytical model fails to provide MIN_PERIOD
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)*','','',"unknown",'MHz')) #analytical model fails to provide MIN_PERIOD
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new_sheet.timing.append(timing_and_current_data_item('Cycle time','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('Access time','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('Positive clk setup','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('Positive clk hold','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('RW setup','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('RW hold','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('AC current','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('Standby current','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('Area','2','3','4'))
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new_sheet.timing.append(timing_and_current_data_item('1','2','3','4'))
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new_sheet.dlv.append(deliverables_item('.sp','SPICE netlists','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'sp')))
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new_sheet.dlv.append(deliverables_item('.v','Verilog simulation models','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'v')))
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new_sheet.dlv.append(deliverables_item('.gds','GDSII layout views','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'gds')))
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new_sheet.dlv.append(deliverables_item('.lef','LEF files','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'lef')))
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new_sheet.dlv.append(deliverables_item('.lib','Synthesis models','<a href="file://{0}">{1}</a>'.format(LIB_NAME,LIB_NAME.replace(OUT_DIR,''))))
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new_sheet.io.append(in_out_item('WORD_SIZE',WORD_SIZE))
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new_sheet.io.append(in_out_item('NUM_WORDS',NUM_WORDS))
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new_sheet.io.append(in_out_item('NUM_BANKS',NUM_BANKS))
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new_sheet.io.append(in_out_item('NUM_RW_PORTS',NUM_RW_PORTS))
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new_sheet.io.append(in_out_item('NUM_R_PORTS',NUM_R_PORTS))
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new_sheet.io.append(in_out_item('NUM_W_PORTS',NUM_W_PORTS))
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class datasheet_gen():
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def datasheet_write(name):
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in_dir = OPTS.openram_temp
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if not (os.path.isdir(in_dir)):
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os.mkdir(in_dir)
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if OPTS.datasheet_gen:
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in_dir = OPTS.openram_temp
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if not (os.path.isdir(in_dir)):
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os.mkdir(in_dir)
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#if not (os.path.isdir(out_dir)):
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# os.mkdir(out_dir)
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#if not (os.path.isdir(out_dir)):
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# os.mkdir(out_dir)
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datasheets = []
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parse_file(in_dir + "/datasheet.info", datasheets)
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datasheets = []
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parse_file(in_dir + "/datasheet.info", datasheets)
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for sheets in datasheets:
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with open(name, 'w+') as f:
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sheets.generate_html()
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f.write(sheets.html)
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for sheets in datasheets:
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with open(name, 'w+') as f:
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sheets.generate_html()
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f.write(sheets.html)
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@ -0,0 +1,11 @@
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from flask_table import *
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class in_out(Table):
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typ = Col('Type')
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description = Col('Description')
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class in_out_item(object):
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def __init__(self, typ, description):
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self.typ = typ
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self.description = description
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@ -100,9 +100,17 @@ def check_versions():
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minor_required = 5
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if not (major_python_version == major_required and minor_python_version >= minor_required):
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debug.error("Python {0}.{1} or greater is required.".format(major_required,minor_required),-1)
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# FIXME: Check versions of other tools here??
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# or, this could be done in each module (e.g. verify, characterizer, etc.)
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global OPTS
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try:
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import flask_table
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OPTS.datasheet_gen = 1
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except:
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OPTS.datasheet_gen = 0
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def init_openram(config_file, is_unit_test=True):
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"""Initialize the technology, paths, simulators, etc."""
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@ -40,7 +40,9 @@ import verify
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from sram import sram
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from sram_config import sram_config
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#from parser import *
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output_extensions = ["sp","v","lib","html"]
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output_extensions = ["sp","v","lib"]
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if OPTS.datasheet_gen:
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output_extensions.append("html")
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if not OPTS.netlist_only:
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output_extensions.extend(["gds","lef"])
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output_files = ["{0}.{1}".format(OPTS.output_name,x) for x in output_extensions]
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Loading…
Reference in New Issue