mirror of https://github.com/VLSIDA/OpenRAM.git
Merge branch 'dev' of github.com:mguthaus/OpenRAM into dev
This commit is contained in:
Matt Guthaus
commit
72b0617e81
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@ -59,15 +59,11 @@ import debug
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from globals import OPTS
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import subprocess
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def write_magic_script(cell_name, gds_name, extract=False):
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""" Write a magic script to perform DRC and optionally extraction. """
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def run_drc(cell_name, gds_name):
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"""Run DRC check on a cell which is implemented in gds_name."""
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global OPTS
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# the runset file contains all the options to run drc
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from tech import drc
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drc_rules = drc["drc_rules"]
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run_file = OPTS.openram_temp + "run_drc.sh"
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f = open(run_file, "w")
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f.write("#!/bin/sh\n")
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@ -82,12 +78,60 @@ def run_drc(cell_name, gds_name):
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f.write("drc catchup\n")
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f.write("drc count total\n")
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f.write("drc count\n")
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if extract:
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f.write("extract\n")
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f.write("ext2spice scale off\n")
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# Can choose hspice, ngspice, or spice3,
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# but they all seem compatible enough.
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#f.write("ext2spice format ngspice\n")
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f.write("ext2spice\n")
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f.write("quit -noprompt\n")
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f.write("EOF\n")
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f.close()
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os.system("chmod u+x {}".format(run_file))
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def write_netgen_script(cell_name, sp_name):
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""" Write a netgen script to perform LVS. """
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global OPTS
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run_file = OPTS.openram_temp + "run_lvs.sh"
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f = open(run_file, "w")
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f.write("#!/bin/sh\n")
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f.write("{} -noconsole << EOF\n".format(OPTS.lvs_exe[1]))
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f.write("readnet {0}{1}.spice\n".format(OPTS.openram_temp,
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cell_name))
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f.write("readnet {}\n".format(sp_name))
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f.write("ignore class c\n")
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# default is on
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#f.write("permute transistors\n")
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f.write("equate class {{{0}{1}.spice nfet}} {{{2} n}}\n".format(OPTS.openram_temp,
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cell_name,
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sp_name))
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f.write("equate class {{{0}{1}.spice pfet}} {{{2} p}}\n".format(OPTS.openram_temp,
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cell_name,
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sp_name))
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#Do the individual commands rather than the built in script
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#f.write("lvs {0}.spice {{{1} {0}}}\n".format(cell_name, sp_name))
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f.write("log file lvs.results\n")
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f.write("log start\n")
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f.write("compare hierarchical {0}{1}.spice {{{2} {1}}}\n".format(OPTS.openram_temp,
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cell_name,
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sp_name))
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f.write("permute\n")
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f.write("run converge\n")
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f.write("log end\n")
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f.write("quit\n")
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f.write("EOF\n")
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f.close()
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os.system("chmod u+x {}".format(run_file))
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def run_drc(cell_name, gds_name, extract=False):
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"""Run DRC check on a cell which is implemented in gds_name."""
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write_magic_script(cell_name, gds_name, extract)
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# run drc
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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@ -131,116 +175,60 @@ def run_drc(cell_name, gds_name):
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return errors
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def run_lvs(name, gds_name, sp_name):
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def run_lvs(cell_name, gds_name, sp_name):
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"""Run LVS check on a given top-level name which is
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implemented in gds_name and sp_name. """
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debug.warning("LVS using magic+netgen not implemented.")
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return 1
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from tech import drc
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lvs_rules = drc["lvs_rules"]
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lvs_runset = {
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'lvsRulesFile': lvs_rules,
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'lvsRunDir': OPTS.openram_temp,
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'lvsLayoutPaths': gds_name,
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'lvsLayoutPrimary': name,
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'lvsSourcePath': sp_name,
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'lvsSourcePrimary': name,
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'lvsSourceSystem': 'SPICE',
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'lvsSpiceFile': OPTS.openram_temp + "extracted.sp",
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'lvsPowerNames': 'vdd',
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'lvsGroundNames': 'gnd',
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'lvsIncludeSVRFCmds': 1,
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'lvsSVRFCmds': '{VIRTUAL CONNECT NAME VDD? GND? ?}',
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'lvsIgnorePorts': 1,
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'lvsERCDatabase': OPTS.openram_temp + name + ".erc.results",
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'lvsERCSummaryFile': OPTS.openram_temp + name + ".erc.summary",
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'lvsReportFile': OPTS.openram_temp + name + ".lvs.report",
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'lvsMaskDBFile': OPTS.openram_temp + name + ".maskdb",
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'cmnFDILayerMapFile': drc["layer_map"],
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'cmnFDIUseLayerMap': 1,
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'cmnVConnectNames': 'vdd, gnd',
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#'cmnVConnectNamesState' : 'ALL', #connects all nets with the same name
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}
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# write the runset file
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f = open(OPTS.openram_temp + "lvs_runset", "w")
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for k in sorted(lvs_runset.iterkeys()):
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f.write("*%s: %s\n" % (k, lvs_runset[k]))
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f.close()
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run_drc(cell_name, gds_name, extract=True)
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write_netgen_script(cell_name, sp_name)
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# run LVS
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, name)
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errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, cell_name)
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outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, cell_name)
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cmd = "{0} -gui -lvs {1}lvs_runset -batch 2> {2} 1> {3}".format(OPTS.lvs_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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cmd = "{0}run_lvs.sh lvs 2> {1} 1> {2}".format(OPTS.openram_temp,
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errfile,
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outfile)
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debug.info(1, cmd)
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os.system(cmd)
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os.chdir(cwd)
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# check the result for these lines in the summary:
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f = open(lvs_runset['lvsReportFile'], "r")
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results = f.readlines()
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f.close()
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# NOT COMPARED
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# CORRECT
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# INCORRECT
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test = re.compile("# CORRECT #")
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correct = filter(test.search, results)
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test = re.compile("NOT COMPARED")
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notcompared = filter(test.search, results)
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test = re.compile("# INCORRECT #")
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incorrect = filter(test.search, results)
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# Errors begin with "Error:"
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test = re.compile("\s+Error:")
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errors = filter(test.search, results)
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for e in errors:
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debug.error(e.strip("\n"))
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summary_errors = len(notcompared) + len(incorrect) + len(errors)
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# also check the extraction summary file
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f = open(lvs_runset['lvsReportFile'] + ".ext", "r")
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results = f.readlines()
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f.close()
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test = re.compile("ERROR:")
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exterrors = filter(test.search, results)
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for e in exterrors:
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debug.error(e.strip("\n"))
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test = re.compile("WARNING:")
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extwarnings = filter(test.search, results)
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for e in extwarnings:
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debug.warning(e.strip("\n"))
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# MRG - 9/26/17 - Change this to exclude warnings because of
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# multiple labels on different pins in column mux.
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ext_errors = len(exterrors)
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ext_warnings = len(extwarnings)
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# also check the output file
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f = open(outfile, "r")
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results = f.readlines()
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f.close()
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# Errors begin with "ERROR:"
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test = re.compile("ERROR:")
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stdouterrors = filter(test.search, results)
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for e in stdouterrors:
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debug.error(e.strip("\n"))
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out_errors = len(stdouterrors)
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# Netlists do not match.
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test = re.compile("Netlists do not match.")
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incorrect = filter(test.search, results)
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# There were property errors.
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test = re.compile("Property errors were found.")
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propertyerrors = filter(test.search, results)
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#total_errors = len(propertyerrors) + len(incorrect)
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total_errors = len(incorrect)
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if len(propertyerrors)>0:
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debug.warning("Property errors found, but not checking them.")
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# Netlists match uniquely.
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test = re.compile("Netlists match uniquely.")
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correct = filter(test.search, results)
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# Fail if they don't match. Something went wrong!
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if correct == 0:
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total_errors += 1
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if total_errors>0:
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# check the result for these lines in the summary:
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f = open("{}lvs.results".format(OPTS.openram_temp), "r")
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results = f.readlines()
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f.close()
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# Just print out the whole file, it is short.
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for e in results:
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debug.error(e.strip("\n"))
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total_errors = summary_errors + out_errors + ext_errors
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return total_errors
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