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OpenRAM
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Convert all DRC and LVS routines to set member variables for drc_errors and lvs_errors.

This commit is contained in:
mrg 2020-07-13 13:01:00 -07:00
parent 2011974e01
commit 716798baae
1 changed files with 19 additions and 16 deletions
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35
compiler/base/hierarchy_design.py
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@ -58,14 +58,17 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
# No layout to check # No layout to check
if OPTS.netlist_only: if OPTS.netlist_only:
return ("skipped", "skipped") self.drc_errors = "skipped"
self.lvs_errors = "skipped"
# Unit tests will check themselves. # Unit tests will check themselves.
if not force_check and OPTS.is_unit_test: elif not force_check and OPTS.is_unit_test:
return ("skipped", "skipped") self.drc_errors = "skipped"
if not force_check and not OPTS.check_lvsdrc: self.lvs_errors = "skipped"
return ("skipped", "skipped") elif not force_check and not OPTS.check_lvsdrc:
self.drc_errors = "skipped"
self.lvs_errors = "skipped"
# Do not run if disabled in options. # Do not run if disabled in options.
if (OPTS.inline_lvsdrc or force_check or final_verification): elif (OPTS.inline_lvsdrc or force_check or final_verification):
tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.name) tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.name)
tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name) tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
@ -104,9 +107,8 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
# No layout to check # No layout to check
if OPTS.netlist_only: if OPTS.netlist_only:
return "skipped" self.drc_errors = "skipped"
elif (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
if (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name) tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
self.gds_write(tempgds) self.gds_write(tempgds)
num_errors = verify.run_drc(self.name, tempgds, final_verification=final_verification) num_errors = verify.run_drc(self.name, tempgds, final_verification=final_verification)
@ -117,9 +119,10 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
if OPTS.purge_temp: if OPTS.purge_temp:
os.remove(tempgds) os.remove(tempgds)
return num_errors
else: else:
return "skipped" self.drc_errors = "skipped"
return self.drc_errors
def LVS(self, final_verification=False): def LVS(self, final_verification=False):
"""Checks LVS for a module""" """Checks LVS for a module"""
@ -130,9 +133,8 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
# No layout to check # No layout to check
if OPTS.netlist_only: if OPTS.netlist_only:
return "skipped" self.lvs_errors = "skipped"
elif (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
if (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.name) tempspice = "{0}/{1}.sp".format(OPTS.openram_temp, self.name)
tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name) tempgds = "{0}/{1}.gds".format(OPTS.openram_temp, self.name)
self.lvs_write(tempspice) self.lvs_write(tempspice)
@ -145,9 +147,10 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
os.remove(tempspice) os.remove(tempspice)
os.remove(tempgds) os.remove(tempgds)
return num_errors
else: else:
return "skipped" self.lvs_errors = "skipped"
return self.lvs_errors
def init_graph_params(self): def init_graph_params(self):
"""Initializes parameters relevant to the graph creation""" """Initializes parameters relevant to the graph creation"""