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OpenRAM
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Merge branch 'dev' of github.com:VLSIDA/PrivateRAM into dev

This commit is contained in:
mrg 2021-06-21 17:37:41 -07:00
parent 58f8c66020 3502bec231
commit 6e22771794
1 changed files with 1 additions and 1 deletions
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2
compiler/modules/bank.py
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@ -620,7 +620,7 @@ class bank(design.design):
self.copy_power_pins(inst, "gnd", add_vias=False)
if 'vpb' in self.bitcell_array_inst.mod.pins and 'vnb' in self.bitcell_array_inst.mod.pins:
for pin_name, supply_name in zip(['vpb','vnb'],['vdd','gnd']):
for pin_name, supply_name in zip(['vpb','vnb'],['gnd','vdd']):
self.copy_power_pins(self.bitcell_array_inst, pin_name, new_name=supply_name)
# If we use the pinvbuf as the decoder, we need to add power pins.