mirror of https://github.com/VLSIDA/OpenRAM.git
Fix missing tech name in path to spice models. Rename models to p,n.
This commit is contained in:
parent
a12ebeed9f
commit
6bf4190dde
|
|
@ -5,7 +5,7 @@
|
||||||
* models from MOSIS or SCN3ME
|
* models from MOSIS or SCN3ME
|
||||||
*********************************************
|
*********************************************
|
||||||
|
|
||||||
.MODEL NFET NMOS (LEVEL=3 VTO=0.669845 KP=113.7771E-6
|
.MODEL n NMOS (LEVEL=4 VTO=0.669845 KP=113.7771E-6
|
||||||
+ NSUB=6E16 U0=458 VFB=-0.851 GAMMA=0.5705 TOX=13.9n
|
+ NSUB=6E16 U0=458 VFB=-0.851 GAMMA=0.5705 TOX=13.9n
|
||||||
+ TNOM=27)
|
+ TNOM=27)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -5,7 +5,7 @@
|
||||||
* models from MOSIS or SCN3ME
|
* models from MOSIS or SCN3ME
|
||||||
*********************************************
|
*********************************************
|
||||||
|
|
||||||
.MODEL PFET PMOS (LEVEL=3 VTO=-0.921340 KP=366.0244-6
|
.MODEL p PMOS (LEVEL=4 VTO=-0.921340 KP=366.0244-6
|
||||||
+ NSUB=6E16 U0=212 VFB=0.395 GAMMA=0.2370 TOX=13.9n
|
+ NSUB=6E16 U0=212 VFB=0.395 GAMMA=0.2370 TOX=13.9n
|
||||||
+ TNOM=27)
|
+ TNOM=27)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -30,7 +30,7 @@ os.environ["DRCLVS_HOME"] = DRCLVS_HOME
|
||||||
# try:
|
# try:
|
||||||
# SPICE_MODEL_DIR = os.path.abspath(os.environ.get("SPICE_MODEL_DIR"))
|
# SPICE_MODEL_DIR = os.path.abspath(os.environ.get("SPICE_MODEL_DIR"))
|
||||||
# except:
|
# except:
|
||||||
os.environ["SPICE_MODEL_DIR"] = OPENRAM_TECH+"/models"
|
os.environ["SPICE_MODEL_DIR"] = "{0}/{1}/models".format(OPENRAM_TECH, TECHNOLOGY)
|
||||||
|
|
||||||
##########################
|
##########################
|
||||||
# Paths required for OPENRAM to function
|
# Paths required for OPENRAM to function
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue