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Added graph functions to compute analytical delay based on graph path.
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@@ -41,7 +41,7 @@ class sense_amp(design.design):
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bitline_pmos_size = 8 #FIXME: This should be set somewhere and referenced. Probably in tech file.
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return spice["min_tx_drain_c"]*(bitline_pmos_size/parameter["min_tx_size"])#ff
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def analytical_delay(self, corner, slew, load):
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def get_stage_effort(self, load):
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#Delay of the sense amp will depend on the size of the amp and the output load.
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parasitic_delay = 1
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cin = (parameter["sa_inv_pmos_size"] + parameter["sa_inv_nmos_size"])/drc("minwidth_tx")
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