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Only add second port if it is specified.

This commit is contained in:
Matt Guthaus 2018-11-14 17:11:23 -08:00
parent 2fd86958a8
commit 66982a9283
1 changed files with 24 additions and 23 deletions
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1
compiler/sram_1bank.py
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@ -93,6 +93,7 @@ class sram_1bank(sram_base):
self.data_dff_insts[port].place(data_pos[port]) self.data_dff_insts[port].place(data_pos[port])
if len(self.all_ports)>1:
# Port 1 # Port 1
port = 1 port = 1
control_pos[port] = vector(self.bank_inst.rx() + self.control_logic_insts[port].width + 2*self.m2_pitch, control_pos[port] = vector(self.bank_inst.rx() + self.control_logic_insts[port].width + 2*self.m2_pitch,