mirror of https://github.com/VLSIDA/OpenRAM.git
PEP8 Formatting
This commit is contained in:
parent
5b23653369
commit
6506622dfb
|
|
@ -5,12 +5,10 @@
|
|||
# (acting for and on behalf of Oklahoma State University)
|
||||
# All rights reserved.
|
||||
#
|
||||
import sys
|
||||
import datetime
|
||||
import getpass
|
||||
import debug
|
||||
from globals import OPTS, print_time
|
||||
from sram_config import sram_config
|
||||
|
||||
|
||||
class sram():
|
||||
"""
|
||||
|
|
@ -40,7 +38,7 @@ class sram():
|
|||
elif self.num_banks == 2:
|
||||
from sram_2bank import sram_2bank as sram
|
||||
else:
|
||||
debug.error("Invalid number of banks.",-1)
|
||||
debug.error("Invalid number of banks.", -1)
|
||||
|
||||
self.s = sram(name, sram_config)
|
||||
self.s.create_netlist()
|
||||
|
|
@ -50,20 +48,18 @@ class sram():
|
|||
if not OPTS.is_unit_test:
|
||||
print_time("SRAM creation", datetime.datetime.now(), start_time)
|
||||
|
||||
|
||||
def sp_write(self,name):
|
||||
def sp_write(self, name):
|
||||
self.s.sp_write(name)
|
||||
|
||||
def lef_write(self,name):
|
||||
def lef_write(self, name):
|
||||
self.s.lef_write(name)
|
||||
|
||||
def gds_write(self,name):
|
||||
def gds_write(self, name):
|
||||
self.s.gds_write(name)
|
||||
|
||||
def verilog_write(self,name):
|
||||
def verilog_write(self, name):
|
||||
self.s.verilog_write(name)
|
||||
|
||||
|
||||
def save(self):
|
||||
""" Save all the output files while reporting time to do it as well. """
|
||||
|
||||
|
|
@ -108,7 +104,6 @@ class sram():
|
|||
lib(out_dir=OPTS.output_path, sram=self.s, sp_file=sp_file)
|
||||
print_time("Characterization", datetime.datetime.now(), start_time)
|
||||
|
||||
|
||||
# Write the config file
|
||||
start_time = datetime.datetime.now()
|
||||
from shutil import copyfile
|
||||
|
|
|
|||
Loading…
Reference in New Issue