mirror of https://github.com/VLSIDA/OpenRAM.git
Add get_lpp() function to router_tech
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@ -50,7 +50,7 @@ class graph:
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This function assumes that p1 and p2 are on the same layer.
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"""
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probe_shape = graph_probe(p1, p2, self.router.vert_lpp if p1.z else self.router.horiz_lpp)
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probe_shape = graph_probe(p1, p2, self.router.get_lpp(p1.z))
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# Check if any blockage blocks this probe
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for blockage in self.graph_blockages:
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# Check if two shapes overlap
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@ -114,6 +114,14 @@ class router_tech:
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else:
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debug.error("Invalid zindex {}".format(zindex), -1)
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def get_lpp(self, zindex):
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if zindex == 1:
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return self.vert_lpp
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elif zindex == 0:
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return self.horiz_lpp
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else:
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debug.error("Invalid zindex {}".format(zindex), -1)
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def get_layer_width_space(self, zindex):
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"""
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These are the width and spacing of a supply layer given a supply rail
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