mirror of https://github.com/VLSIDA/OpenRAM.git
Remove control structure from ngspice. Add probe for ngspice too since it doesn't hurt. Unskip delay test.
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@ -263,22 +263,9 @@ class delay():
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# run until the last cycle time
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# run until the last cycle time
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end_time = self.cycle_times[-1]
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end_time = self.cycle_times[-1]
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self.sf.write(".TRAN 5p {0}n\n".format(end_time))
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self.sf.write(".TRAN 5p {0}n\n".format(end_time))
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self.sf.write(".OPTIONS POST=1 PROBE\n")
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if OPTS.spice_version == "hspice":
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# create plots for all signals
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# create plots for all signals
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self.sf.write(".probe V(*)\n")
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self.sf.write(".OPTIONS POST=1 PROBE\n")
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self.sf.write(".probe V(*)\n")
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# end the stimulus file
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self.sf.write(".end\n")
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self.sf.close()
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else:
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pass
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# This is only needed for ngspice <26
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# self.sf.write(".control\n")
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# self.sf.write("run\n")
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# self.sf.write("quit\n")
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# self.sf.write(".endc\n")
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# end the stimulus file
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# end the stimulus file
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self.sf.write(".end\n")
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self.sf.write(".end\n")
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@ -167,18 +167,8 @@ class setup_hold():
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end_time = 2 * period
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end_time = 2 * period
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self.sf.write(".TRAN 5p {0}n\n".format(end_time))
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self.sf.write(".TRAN 5p {0}n\n".format(end_time))
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self.sf.write(".OPTIONS POST=1 PROBE\n")
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self.sf.write(".OPTIONS POST=1 PROBE\n")
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# create plots for all signals
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if OPTS.spice_version == "hspice":
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self.sf.write(".probe V(*)\n")
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self.sf.write(".probe V(*)\n")
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else:
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pass
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# This is only needed for ngspice <26
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# self.sf.write(".control\n")
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# self.sf.write("run\n")
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# self.sf.write("* plot clk_buf data_buf doutrun\n")
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# self.sf.write("quit\n")
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# self.sf.write(".endc\n")
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# end the stimulus file
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# end the stimulus file
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self.sf.write(".end\n")
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self.sf.write(".end\n")
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@ -13,7 +13,7 @@ import calibre
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OPTS = globals.get_opts()
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OPTS = globals.get_opts()
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@unittest.skip("SKIPPING 21_ngspice_delay_test")
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#@unittest.skip("SKIPPING 21_ngspice_delay_test")
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class timing_sram_test(unittest.TestCase):
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class timing_sram_test(unittest.TestCase):
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def runTest(self):
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def runTest(self):
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@ -53,7 +53,7 @@ class timing_sram_test(unittest.TestCase):
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self.assertTrue(isclose(data['min_period1'],0.078582763671875))
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self.assertTrue(isclose(data['min_period1'],0.078582763671875))
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self.assertTrue(isclose(data['min_period0'],0.25543212890625))
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self.assertTrue(isclose(data['min_period0'],0.25543212890625))
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elif OPTS.tech_name == "scn3me_subm":
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elif OPTS.tech_name == "scn3me_subm":
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self.assertTrue(isclose(data['delay1'],1.618362))
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self.assertTrue(isclose(data['delay1'],1.66442871094)) # diff than hspice
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self.assertTrue(isclose(data['delay0'],2.2635000000000005))
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self.assertTrue(isclose(data['delay0'],2.2635000000000005))
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self.assertTrue(isclose(data['min_period1'],1.53564453125))
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self.assertTrue(isclose(data['min_period1'],1.53564453125))
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self.assertTrue(isclose(data['min_period0'],2.998046875))
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self.assertTrue(isclose(data['min_period0'],2.998046875))
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