Check for single top-level structure in vlsiLayout. Don't allow dff_inv and dff_buf to have same names.

compiler/base/geometry.py

@@ -200,18 +200,19 @@ class instance(geometry):
         self.mod.gds_write_file(self.gds)
         # now write an instance of my module/structure
         new_layout.addInstance(self.gds,
+                               self.mod.name,
                                offsetInMicrons=self.offset,
                                mirror=self.mirror,
                                rotate=self.rotate)
         
     def place(self, offset, mirror="R0", rotate=0):
         """ This updates the placement of an instance. """
-        debug.info(3, "placing instance {}".format(self.name))
         # Update the placement of an already added instance
         self.offset = vector(offset).snap_to_grid()
         self.mirror = mirror
         self.rotate = rotate
         self.update_boundary()
+        debug.info(3, "placing instance {}".format(self))
         
     
     def get_pin(self,name,index=-1):

compiler/base/hierarchy_design.py

@@ -34,20 +34,21 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
         # because each reference must be a unique name.
         # These modules ensure unique names or have no changes if they
         # aren't unique
-        ok_list = ['ms_flop',
-                   'dff',
-                   'dff_buf',
-                   'bitcell',
-                   'contact',
+        ok_list = ['contact',
                    'ptx',
                    'sram',
                    'hierarchical_predecode2x4',
                    'hierarchical_predecode3x8']
-        if name not in hierarchy_design.name_map:
+        # Library cells don't change
+        if self.is_library_cell:
+            return
+        # Name is unique so far
+        elif name not in hierarchy_design.name_map:
             hierarchy_design.name_map.append(name)
         else:
+            # Name is in our list of exceptions (they don't change)
             for ok_names in ok_list:
-                if ok_names in self.__class__.__name__:
+                if ok_names == self.__class__.__name__:
                     break
             else:
                 debug.error("Duplicate layout reference name {0} of class {1}. GDS2 requires names be unique.".format(name,self.__class__),-1)

compiler/gdsMill/gdsMill/vlsiLayout.py

@@ -148,13 +148,13 @@ class VlsiLayout:
         structureNames=[]
         for name in self.structures:
             structureNames.append(name)
-            
         for name in self.structures:
             if(len(self.structures[name].srefs)>0): #does this structure reference any others?
                 for sref in self.structures[name].srefs: #go through each reference
                     if sref.sName in structureNames: #and compare to our list
                         structureNames.remove(sref.sName)
 
+        debug.check(len(structureNames)==1,"Multiple possible root structures in the layout: {}".format(str(structureNames)))
         self.rootStructureName = structureNames[0]
 
     def traverseTheHierarchy(self, startingStructureName=None, delegateFunction = None, 
@@ -304,6 +304,7 @@ class VlsiLayout:
                         debug.info(1,"DEBUG:  Structure %s Found"%StructureName)
                     StructureFound = True
 
+        debug.check(StructureFound,"Could not find layout to instantiate {}".format(StructureName))
 
 
         # If layoutToAdd is a unique object (not this), then copy hierarchy, 

compiler/modules/dff_buf.py

@@ -12,11 +12,13 @@ class dff_buf(design.design):
     with two inverters, of variable size, to provide q
     and qbar. This is to enable driving large fanout loads.
     """
-
+    unique_id = 1
+    
     def __init__(self, inv1_size=2, inv2_size=4, name=""):
 
         if name=="":
-            name = "dff_buf_{0}_{1}".format(inv1_size, inv2_size)
+            name = "dff_buf_{0}".format(dff_buf.unique_id)
+            dff_buf.unique_id += 1
         design.design.__init__(self, name)
         debug.info(1, "Creating {}".format(self.name))
 

compiler/modules/dff_buf_array.py

@@ -11,13 +11,15 @@ class dff_buf_array(design.design):
     This is a simple row (or multiple rows) of flops.
     Unlike the data flops, these are never spaced out.
     """
-
+    unique_id = 1
+    
     def __init__(self, rows, columns, inv1_size=2, inv2_size=4, name=""):
         self.rows = rows
         self.columns = columns
 
         if name=="":
-            name = "dff_buf_array_{0}x{1}".format(rows, columns)
+            name = "dff_buf_array_{0}x{1}_{2}".format(rows, columns, dff_buf_array.unique_id)
+            dff_buf_array.unique_id += 1
         design.design.__init__(self, name)
         debug.info(1, "Creating {}".format(self.name))
         self.inv1_size = inv1_size

compiler/modules/dff_inv.py

@@ -11,11 +11,13 @@ class dff_inv(design.design):
     This is a simple DFF with an inverted output. Some DFFs
     do not have Qbar, so this will create it.
     """
-
+    unique_id = 1
+    
     def __init__(self, inv_size=2, name=""):
 
         if name=="":
-            name = "dff_inv_{0}".format(inv_size)
+            name = "dff_inv_{0}".format(dff_inv.unique_id)
+            dff_inv.unique_id += 1
         design.design.__init__(self, name)
         debug.info(1, "Creating {}".format(self.name))
         self.inv_size = inv_size

compiler/modules/dff_inv_array.py

@@ -11,13 +11,15 @@ class dff_inv_array(design.design):
     This is a simple row (or multiple rows) of flops.
     Unlike the data flops, these are never spaced out.
     """
-
+    unique_id = 1
+    
     def __init__(self, rows, columns, inv_size=2, name=""):
         self.rows = rows
         self.columns = columns
 
         if name=="":
-            name = "dff_inv_array_{0}x{1}".format(rows, columns)
+            name = "dff_inv_array_{0}x{1}_{2}".format(rows, columns, dff_inv_array.unique_id)
+            dff_inv_array.unique_id += 1
         design.design.__init__(self, name)
         debug.info(1, "Creating {}".format(self.name))
         self.inv_size = inv_size