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add parameter to make routing horizonal vdd rails easier

This commit is contained in:
SWalker 2023-09-14 21:31:45 -07:00
parent 4b3af38727
commit 5c22e382b5
2 changed files with 27 additions and 12 deletions
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28
compiler/base/hierarchy_layout.py
View File

@ -942,14 +942,19 @@ class layout():
return (bot_rect, top_rect) return (bot_rect, top_rect)
def route_horizontal_pins(self, name, insts=None, layer=None, xside="cx", yside="cy", full_width=True): def route_horizontal_pins(self, name, insts=None, layer=None, xside="cx", yside="cy", full_width=True, new_name=None):
""" """
Route together all of the pins of a given name that horizontally align. Route together all of the pins of a given name that horizontally align.
Uses local_insts if insts not specified. Uses local_insts if insts not specified.
Uses center of pin by default, or top or botom if specified. Uses center of pin by default, or top or botom if specified.
New top level pin can be renamed with new_name, otherwise the new pin will keep the same name as old pins
TODO: Add equally spaced option for IR drop min, right now just 2 TODO: Add equally spaced option for IR drop min, right now just 2
""" """
if new_name is not None:
pin_name = new_name
else:
pin_name = name
bins = {} bins = {}
if not insts: if not insts:
@ -1009,16 +1014,17 @@ class layout():
left_pos = vector(left_x + 0.5 * via_width, y) left_pos = vector(left_x + 0.5 * via_width, y)
right_pos = vector(right_x + 0.5 * via_width, y) right_pos = vector(right_x + 0.5 * via_width, y)
# self.add_layout_pin_rect_ends(name=name, # self.add_layout_pin_rect_ends(name=name,
# layer=pin_layer, # layer=pin_layer,
# start=left_pos, # start=left_pos,
# end=right_pos, # end=right_pos,
# width=via_height) # width=via_height)
self.add_layout_pin_segment_center(text=name,
layer=pin_layer, self.add_layout_pin_segment_center(text=pin_name,
start=left_pos, layer=pin_layer,
end=right_pos, start=left_pos,
width=via_height) end=right_pos,
width=via_height)
def add_layout_end_pin_segment_center(self, text, layer, start, end): def add_layout_end_pin_segment_center(self, text, layer, start, end):
""" """

11
compiler/modules/rom_precharge_array.py
View File

@ -134,7 +134,16 @@ class rom_precharge_array(design):
self.add_layout_pin_rect_center(bl, self.bitline_layer, source_pin.center()) self.add_layout_pin_rect_center(bl, self.bitline_layer, source_pin.center())
def route_supply(self): def route_supply(self):
self.route_horizontal_pins("vdd", insts=self.pmos_insts, layer=self.strap_layer)
# Hacky way to route all the vdd pins together and then create a layout pin on only one side.
self.route_horizontal_pins("vdd", insts=self.pmos_insts, layer=self.strap_layer, new_name="vdd_tmp")
tmp_vdd = self.get_pin("vdd_tmp")
self.add_layout_pin_rect_center("vdd", layer=self.strap_layer, offset=tmp_vdd.lc(), height=tmp_vdd.height())
self.add_segment_center(layer=self.strap_layer, start=tmp_vdd.lc(), end=tmp_vdd.rc(), width=tmp_vdd.height())
self.remove_layout_pin("vdd_tmp")
def connect_taps(self): def connect_taps(self):
array_pins = [self.tap_insts[i].get_pin("poly_tap") for i in range(len(self.tap_insts))] array_pins = [self.tap_insts[i].get_pin("poly_tap") for i in range(len(self.tap_insts))]