mirror of https://github.com/VLSIDA/OpenRAM.git
Added quality improvements to graph: improved naming, auto vdd/gnd removal
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@ -9,28 +9,43 @@ import debug
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from vector import vector
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from pin_layout import pin_layout
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class graph():
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"""Implements a directed graph"""
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class timing_graph():
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"""Implements a directed graph
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Nodes are currently just Strings.
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"""
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def __init__(self):
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self.graph = defaultdict(list)
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self.graph = defaultdict(set)
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def add_edge(self, u, v):
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def add_edge(self, src_node, dest_node):
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"""Adds edge to graph. Nodes added as well if they do not exist."""
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if v not in self.graph[u]:
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self.graph[u].append(v)
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src_node = src_node.lower()
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dest_node = dest_node.lower()
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self.graph[src_node].add(dest_node)
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def add_node(self, u):
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def add_node(self, node):
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"""Add node to graph with no edges"""
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if not u in self.graph:
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self.graph[u] = []
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node = node.lower()
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if not node in self.graph:
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self.graph[node] = set()
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def remove_edges(self, node):
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"""Helper function to remove edges, useful for removing vdd/gnd"""
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self.graph[node] = []
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node = node.lower()
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self.graph[node] = set()
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def print_all_paths(self,s, d):
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def print_all_paths(self, src_node, dest_node, rmv_rail_nodes=True):
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"""Traverse all paths from source to destination"""
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src_node = src_node.lower()
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dest_node = dest_node.lower()
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#Remove vdd and gnd by default
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#Will require edits if separate supplies are implemented.
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if rmv_rail_nodes:
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#Names are also assumed.
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self.remove_edges('vdd')
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self.remove_edges('gnd')
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# Mark all the vertices as not visited
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visited = set()
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@ -39,30 +54,30 @@ class graph():
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self.path_count = 0
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# Call the recursive helper function to print all paths
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self.print_all_paths_util(s, d,visited, path)
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self.print_all_paths_util(src_node, dest_node, visited, path)
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debug.info(1, "Paths found={}".format(self.path_count))
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def print_all_paths_util(self, u, d, visited, path):
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def print_all_paths_util(self, cur_node, dest_node, visited, path):
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"""Recursive function to find all paths in a Depth First Search manner"""
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# Mark the current node as visited and store in path
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visited.add(u)
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path.append(u)
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visited.add(cur_node)
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path.append(cur_node)
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# If current vertex is same as destination, then print
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# current path[]
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if u == d:
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if cur_node == dest_node:
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debug.info(1,"{}".format(path))
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self.path_count+=1
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else:
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# If current vertex is not destination
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#Recur for all the vertices adjacent to this vertex
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for i in self.graph[u]:
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if i not in visited:
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self.print_all_paths_util(i, d, visited, path)
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for node in self.graph[cur_node]:
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if node not in visited:
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self.print_all_paths_util(node, dest_node, visited, path)
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# Remove current vertex from path[] and mark it as unvisited
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path.pop()
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visited.remove(u)
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visited.remove(cur_node)
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def __str__(self):
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""" override print function output """
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@ -44,13 +44,13 @@ class timing_sram_test(openram_test):
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debug.info(1,'pins={}'.format(s.s.pins))
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import graph_util
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graph = graph_util.graph()
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graph = graph_util.timing_graph()
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pins=['DIN0[0]', 'ADDR0[0]', 'ADDR0[1]', 'ADDR0[2]', 'ADDR0[3]', 'csb0', 'web0', 'clk0', 'DOUT0[0]', 'vdd', 'gnd']
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s.s.build_graph(graph,"Xsram",pins)
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graph.remove_edges('vdd')
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graph.remove_edges('gnd')
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#debug.info(1,"{}".format(graph))
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graph.print_all_paths('clk0', 'DOUT0[0]')
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# import sys
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# sys.exit(1)
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tempspice = OPTS.openram_temp + "temp.sp"
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s.sp_write(tempspice)
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