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remove MY mirroring in scmos

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Jesse Cirimelli-Low
2023-08-01 19:05:55 -07:00
parent d9d8cb2983
commit 5a764c9d43
3 changed files with 8 additions and 12 deletions
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compiler/modules/dummy_array.py
+3 -5
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@@ -52,11 +52,9 @@ class dummy_array(bitcell_base_array):
def create_instances(self):
""" Create the module instances used in this design """
self.cell_inst={}
core_block = [[0 for x in range(2)] for y in range(2)]
core_block[(0 + self.column_offset) %2][(0+self.mirror) %2] = geometry.instance("core_0_0", mod=self.dummy_cell, is_bitcell=True)
core_block[(0 + self.column_offset) %2][(1+self.mirror) %2] = geometry.instance("core_1_0", mod=self.dummy_cell, is_bitcell=True, mirror='MX')
core_block[(1 + self.column_offset) %2][(0+self.mirror) %2] = geometry.instance("core_0_1", mod=self.dummy_cell, is_bitcell=True, mirror='MY')
core_block[(1 + self.column_offset) %2][(1+self.mirror) %2] = geometry.instance("core_1_1", mod=self.dummy_cell, is_bitcell=True, mirror='XY')
core_block = [[0 for x in range(1)] for y in range(2)]
core_block[(0+self.mirror) %2][0] = geometry.instance("core_0_0", mod=self.dummy_cell, is_bitcell=True)
core_block[(1+self.mirror) %2][0] = geometry.instance("core_1_0", mod=self.dummy_cell, is_bitcell=True, mirror='MX')
self.pattern = pattern(self, "dummy_array", core_block, num_rows=self.row_size, num_cols=self.column_size)