mirror of https://github.com/VLSIDA/OpenRAM.git
Always route data dff on m3 stack.
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@ -420,11 +420,11 @@ class sram_1bank(sram_base):
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if len(route_map) > 0:
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# The write masks will have blockages on M1
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if self.num_wmasks > 0 and port in self.write_ports:
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layer_stack = self.m3_stack
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else:
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layer_stack = self.m1_stack
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# if self.num_wmasks > 0 and port in self.write_ports:
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# layer_stack = self.m3_stack
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# else:
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# layer_stack = self.m1_stack
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layer_stack = self.m3_stack
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if port == 0:
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offset = vector(self.control_logic_insts[port].rx() + self.dff.width,
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- self.data_bus_size[port] + 2 * self.m3_pitch)
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