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updated the cell name for layout and schematic

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hadirkhan10 2023-01-23 17:56:43 -08:00 committed by SWalker
parent 4b4153bdea
commit 561e0c228c
2 changed files with 1 additions and 1 deletions
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BIN
technology/gf180mcu/gds_lib/018SRAM_cell1_128x8m81.gds → technology/gf180mcu/gds_lib/cell1rw.gds
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technology/gf180mcu/sp_lib/018SRAM_cell1_128x8m81.sp → technology/gf180mcu/sp_lib/cell1rw.sp
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@ -1,6 +1,6 @@
* NGSPICE file created from 018SRAM_cell1_128x8m81.ext - technology: gf180mcuC
.subckt x018SRAM_cell1_128x8m81 VDD WL GND BL BR nwell pwell
.subckt cell1rw VDD WL GND BL BR nwell pwell
X0 GND a_63_149# a_18_103# pwell nmos_6p0 w=0.95u l=0.6u
X1 a_18_103# WL BL pwell nmos_6p0 w=0.6u l=0.77u
X2 a_63_149# a_18_103# VDD nwell pmos_6p0 w=0.6u l=0.6u