mirror of https://github.com/VLSIDA/OpenRAM.git
Merge branch 'dev' into datasheet_gen
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commit
55b01255ef
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@ -98,6 +98,12 @@ output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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# Disable analytical models for full characterization (WARNING: slow!)
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# analytical_delay = False
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# To force this to use magic and netgen for DRC/LVS/PEX
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# Could be calibre for FreePDK45
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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```
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You can then run OpenRAM by executing:
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