Remove library code and move to its own repository

lib/Makefile

@@ -1,14 +0,0 @@
-SUBDIRS := $(wildcard */.)
-SUBDIRSCLEAN=$(addsuffix clean,$(SUBDIRS))
-
-all: $(SUBDIRS)
-
-$(SUBDIRS):
-	$(MAKE) -k -C $@
-
-clean: 
-	for dir in $(SUBDIRS); do \
-		$(MAKE) -C $$dir $@; \
-	done
-
-.PHONY: all $(SUBDIRS) $(SUBDIRSCLEAN)

lib/README.md

@@ -1,5 +0,0 @@
-This directory contains a set of common sizes based on
-discussions with users. All of the files are pre-computed
-to that common-case users don't need to setup/use OpenRAM.
-The results will be updated automatically as improvements
-are made to OpenRAM.

lib/freepdk45/Makefile

@@ -1,32 +0,0 @@
-CUR_DIR = $(shell pwd)
-TEST_DIR = ${CUR_DIR}/tests
-
-#MAKEFLAGS += -j 2
-
-CONFIG_DIR = configs
-OUT_DIRS = sp lib lef gds  verilog
-$(shell   mkdir -p $(OUT_DIRS))
-
-SRCS=$(wildcard $(CONFIG_DIR)/*.py)
-SPICES=$(SRCS:.py=.sp)
-all : $(SPICES) 
-
-# Characterize and perform DRC/LVS
-OPTS = -c
-# Do not characterize or perform DRC/LVS
-#OPTS += -n
-# Verbosity
-OPTS += -v
-%.sp : %.py
-	$(eval bname=$(basename $(notdir $<)))
-	openram.py $(OPTS) $< 2>&1 > $(bname).log
-	mv $(bname).lef lef
-	mv $(bname).v verilog
-	mv $(bname).sp sp
-	mv $(bname).gds gds
-	mv $(bname)*.lib lib
-
-clean:
-	rm -f *.log configs/*.pyc *~ *.gds *.lib *.sp *.v *.lef
-	rm -f gds/* lef/* lib/* sp/* verilog/*
-

lib/freepdk45/configs/sram_128b_1024_1rw_freepdk45.py

@@ -1,8 +0,0 @@
-word_size = 128
-num_words = 1024
-num_banks = 1
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_32b_1024_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 32
-num_words = 1024
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_32b_2048_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 32
-num_words = 2048
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_32b_256_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 32
-num_words = 256
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_32b_512_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 32
-num_words = 512
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_64b_1024_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 64
-num_words = 1024
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_8b_1024_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 8
-num_words = 1024
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_8b_256_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 8
-num_words = 256
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/freepdk45/configs/sram_8b_512_1rw_freepdk45.py

@@ -1,7 +0,0 @@
-word_size = 8
-num_words = 512
-
-tech_name = "freepdk45"
-process_corners = ["TT"]
-supply_voltages = [1.0]
-temperatures = [25]

lib/scn4m_subm/Makefile

@@ -1,33 +0,0 @@
-CUR_DIR = $(shell pwd)
-TEST_DIR = ${CUR_DIR}/tests
-
-#MAKEFLAGS += -j 2
-
-CONFIG_DIR = configs
-OUT_DIRS = sp lib lef gds  verilog
-$(shell   mkdir -p $(OUT_DIRS))
-
-SRCS=$(wildcard $(CONFIG_DIR)/*.py)
-SPICES=$(SRCS:.py=.sp)
-all : $(SPICES) 
-
-OPTS = 
-# Characterize and perform DRC/LVS
-#OPTS = -c 
-# Do not characterize or perform DRC/LVS
-#OPTS += -n
-# Verbosity
-OPTS += -v
-%.sp : %.py
-	$(eval bname=$(basename $(notdir $<)))
-	openram.py $(OPTS) $< 2>&1 > $(bname).log
-	mv $(bname).lef lef
-	mv $(bname).v verilog
-	mv $(bname).sp sp
-	mv $(bname).gds gds
-	mv $(bname)*.lib lib
-
-clean:
-	rm -f *.log configs/*.pyc *~ *.gds *.lib *.sp *.v *.lef
-	rm -f gds/* lef/* lib/* sp/* verilog/*
-

lib/scn4m_subm/configs/sram_128b_1024_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 128
-num_words = 1024
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_32b_1024_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 32
-num_words = 1024
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_32b_2048_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 32
-num_words = 2048
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_32b_256_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 32
-num_words = 256
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_32b_512_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 32
-num_words = 512
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_64b_1024_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 64
-num_words = 1024
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_8b_1024_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 8
-num_words = 1024
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_8b_256_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 8
-num_words = 256
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-

lib/scn4m_subm/configs/sram_8b_512_1rw_scn4m_subm.py

@@ -1,12 +0,0 @@
-word_size = 8
-num_words = 512
-
-tech_name = "scn4m_subm"
-process_corners = ["TT"]
-supply_voltages = [ 5.0 ]
-temperatures = [ 25 ]
-
-drc_name = "magic"
-lvs_name = "netgen"
-pex_name = "magic"
-