luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Add noninverting logic function to custom decoder cells.

This commit is contained in:
mrg 2021-04-22 16:13:54 -07:00
parent d018963866
commit 467aaa708d
3 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
compiler/custom/nand2_dec.py
View File

@ -70,3 +70,7 @@ class nand2_dec(design.design):
""" """
self.add_graph_edges(graph, port_nets) self.add_graph_edges(graph, port_nets)
def is_non_inverting(self):
"""Return input to output polarity for module"""
return False

4
compiler/custom/nand3_dec.py
View File

@ -70,3 +70,7 @@ class nand3_dec(design.design):
""" """
self.add_graph_edges(graph, port_nets) self.add_graph_edges(graph, port_nets)
def is_non_inverting(self):
"""Return input to output polarity for module"""
return False

4
compiler/custom/nand4_dec.py
View File

@ -70,3 +70,7 @@ class nand4_dec(design.design):
""" """
self.add_graph_edges(graph, port_nets) self.add_graph_edges(graph, port_nets)
def is_non_inverting(self):
"""Return input to output polarity for module"""
return False