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Connected wmask in the spice netlist.

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jsowash
2019-07-19 13:17:55 -07:00
parent 082decba18
commit 45cb159d7f
8 changed files with 102 additions and 31 deletions
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compiler/modules/bank.py
+12
View File
@@ -30,6 +30,8 @@ class bank(design.design):
self.sram_config = sram_config
sram_config.set_local_config(self)
if (self.word_size != self.write_size):
self.num_wmask = int(self.word_size/self.write_size)
if name == "":
name = "bank_{0}_{1}".format(self.word_size, self.num_words)
@@ -98,6 +100,11 @@ class bank(design.design):
self.add_pin("p_en_bar{0}".format(port), "INPUT")
for port in self.write_ports:
self.add_pin("w_en{0}".format(port), "INPUT")
if (self.word_size != self.write_size):
for bit in range(self.num_wmask):
self.add_pin("bank_wmask{0}_{1}".format(port,bit),"INPUT")
# for bit in range(self.num_wmask):
# self.add_pin("wdriver_sel{0}_{1}".format(port, bit),"INOUT")
for port in self.all_ports:
self.add_pin("wl_en{0}".format(port), "INPUT")
self.add_pin("vdd","POWER")
@@ -406,6 +413,11 @@ class bank(design.design):
temp.append("p_en_bar{0}".format(port))
if port in self.write_ports:
temp.append("w_en{0}".format(port))
if (self.word_size != self.write_size):
for bit in range(self.num_wmask):
temp.append("bank_wmask{0}_{1}".format(port, bit))
# for bit in range(self.num_wmask):
# temp.append("wdriver_sel_{0}_{1}".format(port, bit))
temp.extend(["vdd","gnd"])
self.connect_inst(temp)
compiler/modules/port_data.py
+26 -8
View File
@@ -21,7 +21,8 @@ class port_data(design.design):
sram_config.set_local_config(self)
self.port = port
self.num_wmask = int(self.word_size/self.write_size)
if (self.word_size != self.write_size):
self.num_wmask = int(self.word_size/self.write_size)
if name == "":
name = "port_data_{0}".format(self.port)
@@ -96,6 +97,11 @@ class port_data(design.design):
self.add_pin("p_en_bar", "INPUT")
if self.port in self.write_ports:
self.add_pin("w_en", "INPUT")
if (self.word_size != self.write_size):
for bit in range(self.num_wmask):
self.add_pin("bank_wmask_{}".format(bit),"INPUT")
# for bit in range(self.num_wmask):
# self.add_pin("wdriver_sel_{}".format(bit), "INOUT")
self.add_pin("vdd","POWER")
self.add_pin("gnd","GROUND")
@@ -168,7 +174,8 @@ class port_data(design.design):
if self.port in self.write_ports:
self.write_driver_array = factory.create(module_type="write_driver_array",
columns=self.num_cols,
word_size=self.word_size)
word_size=self.word_size,
write_size=self.write_size)
self.add_mod(self.write_driver_array)
if (self.word_size != self.write_size):
self.write_mask_and_array = factory.create(module_type="write_mask_and_array",
@@ -282,9 +289,8 @@ class port_data(design.design):
mod=self.write_driver_array)
temp = []
m
for bit in range(self.word_size):
temp.append("din_{}".format(bit))
for bit in range(self.word_size):
temp.append("din_{}".format(bit))
for bit in range(self.word_size):
if (self.words_per_row == 1):
@@ -293,7 +299,16 @@ class port_data(design.design):
else:
temp.append(self.bl_names[self.port]+"_out_{0}".format(bit))
temp.append(self.br_names[self.port]+"_out_{0}".format(bit))
temp.extend(["w_en", "vdd", "gnd"])
if (self.write_size != self.word_size):
i = 0
for bit in range(0,self.word_size,self.write_size):
for x in range(self.write_size):
temp.append("wdriver_sel_{}".format(i))
i+=1
else:
temp.append("w_en")
temp.extend(["vdd", "gnd"])
self.connect_inst(temp)
@@ -304,8 +319,11 @@ class port_data(design.design):
temp = []
for bit in range(self.num_wmask):
temp.append("write_mask_{}".format(bit))
temp.extend(["w_en", "vdd", "gnd"])
temp.append("bank_wmask_{}".format(bit))
temp.extend(["w_en"])
for bit in range(self.num_wmask):
temp.append("wdriver_sel_{}".format(bit))
temp.extend(["vdd", "gnd"])
self.connect_inst(temp)
compiler/modules/write_driver_array.py
+17 -6
View File
@@ -19,7 +19,7 @@ class write_driver_array(design.design):
Dynamically generated write driver array of all bitlines.
"""
def __init__(self, name, columns, word_size):
def __init__(self, name, columns, word_size,write_size):
design.design.__init__(self, name)
debug.info(1, "Creating {0}".format(self.name))
self.add_comment("columns: {0}".format(columns))
@@ -27,6 +27,7 @@ class write_driver_array(design.design):
self.columns = columns
self.word_size = word_size
self.write_size = write_size
self.words_per_row = int(columns / word_size)
self.create_netlist()
@@ -59,7 +60,11 @@ class write_driver_array(design.design):
for i in range(self.word_size):
self.add_pin("bl_{0}".format(i))
self.add_pin("br_{0}".format(i))
self.add_pin("en")
if self.word_size != self.write_size:
for i in range(self.word_size):
self.add_pin("en_{}".format(i))
else:
self.add_pin("en")
self.add_pin("vdd")
self.add_pin("gnd")
@@ -79,10 +84,16 @@ class write_driver_array(design.design):
self.driver_insts[index]=self.add_inst(name=name,
mod=self.driver)
self.connect_inst(["data_{0}".format(index),
"bl_{0}".format(index),
"br_{0}".format(index),
"en", "vdd", "gnd"])
if self.word_size != self.write_size:
self.connect_inst(["data_{0}".format(index),
"bl_{0}".format(index),
"br_{0}".format(index),
"en_{0}".format(index), "vdd", "gnd"])
else:
self.connect_inst(["data_{0}".format(index),
"bl_{0}".format(index),
"br_{0}".format(index),
"en", "vdd", "gnd"])
def place_write_array(self):
compiler/modules/write_mask_and_array.py
+8 -6
View File
@@ -60,10 +60,12 @@ class write_mask_and_array(design.design):
def add_pins(self):
for bit in range(self.num_wmask):
self.add_pin("wdriver_sel_{}".format(bit))
self.add_pin("en")
self.add_pin("vdd")
self.add_pin("gnd")
self.add_pin("wmask_in_{}".format(bit),"INPUT")
self.add_pin("en", "INPUT")
for bit in range(self.num_wmask):
self.add_pin("wmask_out_{}".format(bit),"OUTPUT")
self.add_pin("vdd","POWER")
self.add_pin("gnd","GROUND")
def add_modules(self):
self.wmask = factory.create(module_type="dff_buf")
@@ -94,9 +96,9 @@ class write_mask_and_array(design.design):
name = "and2_{}".format(bit)
self.and2_insts[bit] = self.add_inst(name=name,
mod=self.and2)
self.connect_inst(["bank_wmask_{}".format(bit),
self.connect_inst(["wmask_in_{}".format(bit),
"en",
"wdriver_sel_{}".format(bit),
"wmask_out_{}".format(bit),
"vdd", "gnd"])