Add example 1w/1r

2019-02-24 09:57:34 -08:00 · 2019-02-24 09:57:34 -08:00 · 4577d380f9
parent 6cdc870091
commit 4577d380f9
1 changed files with 20 additions and 0 deletions
--- a/compiler/example_configs/example_config_1w_1r_scn4m_subm.py
+++ b/compiler/example_configs/example_config_1w_1r_scn4m_subm.py
@ -0,0 +1,20 @@
+word_size = 2
+num_words = 16
+
+bitcell = "bitcell_1w_1r"
+replica_bitcell = "replica_bitcell_1w_1r"
+num_rw_ports = 1
+num_r_ports = 1
+num_w_ports = 0
+
+tech_name = "scn4m_subm"
+process_corners = ["TT"]
+supply_voltages = [5.0]
+temperatures = [25]
+
+output_path = "temp"
+output_name = "sram_1w_1r_{0}_{1}_{2}".format(word_size,num_words,tech_name)
+
+drc_name = "magic"
+lvs_name = "netgen"
+pex_name = "magic"