mirror of https://github.com/VLSIDA/OpenRAM.git
Added wmask to lib.py.
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1a72070f04
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452cc5e443
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@ -109,6 +109,8 @@ class lib:
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#set the read and write port as inputs.
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self.write_data_bus(port)
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self.write_addr_bus(port)
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if self.sram.write_size:
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self.write_wmask_bus(port)
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self.write_control_pins(port) #need to split this into sram and port control signals
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self.write_clk_timing_power(port)
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@ -400,6 +402,20 @@ class lib:
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self.lib.write(" }\n")
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self.lib.write(" }\n\n")
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def write_wmask_bus(self, port):
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""" Adds addr bus timing results."""
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self.lib.write(" bus(wmask{0}){{\n".format(port))
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self.lib.write(" bus_type : wmask; \n")
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self.lib.write(" direction : input; \n")
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self.lib.write(" capacitance : {0}; \n".format(tech.spice["dff_in_cap"] / 1000))
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self.lib.write(" max_transition : {0};\n".format(self.slews[-1]))
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self.lib.write(" pin(wmask{0}[{1}:0])".format(port, self.sram.num_wmasks - 1))
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self.lib.write("{\n")
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self.write_FF_setuphold(port)
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self.lib.write(" }\n")
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self.lib.write(" }\n\n")
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def write_control_pins(self, port):
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""" Adds control pins timing results."""
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@ -107,16 +107,11 @@ class write_mask_and_array(design.design):
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self.nand2 = factory.create(module_type="pnand2")
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supply_pin=self.nand2.get_pin("vdd")
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# Create the enable pin that connects all write mask AND array's B pins
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beg_en_pin = self.and2_insts[0].get_pin("B")
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end_en_pin = self.and2_insts[self.num_wmasks-1].get_pin("B")
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if self.port == 0:
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self.add_layout_pin(text="en",
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layer="metal3",
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offset=beg_en_pin.bc(),
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width=end_en_pin.cx() - beg_en_pin.cx())
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else:
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if self.port % 2:
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# Extend metal3 to edge of AND array in multiport
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en_to_edge = self.and2.width - beg_en_pin.cx()
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self.add_layout_pin(text="en",
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layer="metal3",
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@ -126,6 +121,11 @@ class write_mask_and_array(design.design):
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offset=vector(end_en_pin.cx() + en_to_edge, end_en_pin.cy()))
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self.add_via_center(layers=("metal2", "via2", "metal3"),
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offset=vector(end_en_pin.cx() + en_to_edge, end_en_pin.cy()))
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else:
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self.add_layout_pin(text="en",
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layer="metal3",
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offset=beg_en_pin.bc(),
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width=end_en_pin.cx() - beg_en_pin.cx())
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for i in range(self.num_wmasks):
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# Copy remaining layout pins
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