mirror of https://github.com/VLSIDA/OpenRAM.git
Add TODO to convert lib to negative edge for data
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@ -32,3 +32,6 @@ Change the delay measurement to be from the negative clock edge to
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remove the dependency on the clock period.
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remove the dependency on the clock period.
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Remove duplicate clock inverter in MS flop.
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Remove duplicate clock inverter in MS flop.
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Make lib file have delay relative to negedge for DATA. Must update
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timing code too.
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