mirror of https://github.com/VLSIDA/OpenRAM.git
add pex function for magic and openram test
This commit is contained in:
parent
91febec3a2
commit
3f3ee9b885
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@ -16,7 +16,7 @@ import debug
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class openram_test(unittest.TestCase):
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""" Base unit test that we have some shared classes in. """
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def local_drc_check(self, w):
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self.reset()
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@ -31,11 +31,11 @@ class openram_test(unittest.TestCase):
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if OPTS.purge_temp:
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self.cleanup()
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def local_check(self, a, final_verification=False):
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self.reset()
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tempspice = "{0}{1}.sp".format(OPTS.openram_temp,a.name)
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tempgds = "{0}{1}.gds".format(OPTS.openram_temp,a.name)
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@ -52,7 +52,7 @@ class openram_test(unittest.TestCase):
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#shutil.make_archive(zip_file, 'zip', OPTS.openram_temp)
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self.fail("DRC failed: {}".format(a.name))
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result=verify.run_lvs(a.name, tempgds, tempspice, final_verification=final_verification)
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if result != 0:
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#zip_file = "/tmp/{0}_{1}".format(a.name,os.getpid())
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@ -63,6 +63,17 @@ class openram_test(unittest.TestCase):
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if OPTS.purge_temp:
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self.cleanup()
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def run_pex(self, a, output=None):
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if output == None:
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output = OPTS.openram_temp + a.name + ".pex.netlist"
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tempspice = "{0}{1}.sp".format(OPTS.openram_temp,a.name)
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tempgds = "{0}{1}.gds".format(OPTS.openram_temp,a.name)
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import verify
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result=verify.run_pex(a.name, tempgds, tempspice, output=output, final_verification=False)
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if result != 0:
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self.fail("PEX ERROR: {}".format(a.name))
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return output
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def find_feasible_test_period(self, delay_obj, sram, load, slew):
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"""Creates a delay simulation to determine a feasible period for the functional tests to run.
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@ -75,19 +86,19 @@ class openram_test(unittest.TestCase):
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delay_obj.create_signal_names()
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delay_obj.create_measurement_names()
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delay_obj.create_measurement_objects()
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delay_obj.find_feasible_period_one_port(test_port)
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return delay_obj.period
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delay_obj.find_feasible_period_one_port(test_port)
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return delay_obj.period
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def cleanup(self):
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""" Reset the duplicate checker and cleanup files. """
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files = glob.glob(OPTS.openram_temp + '*')
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for f in files:
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# Only remove the files
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if os.path.isfile(f):
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os.remove(f)
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os.remove(f)
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def reset(self):
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"""
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"""
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Reset everything after each test.
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"""
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# Reset the static duplicate name checker for unit tests.
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@ -116,7 +127,7 @@ class openram_test(unittest.TestCase):
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data_string=pprint.pformat(data)
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debug.error("Results exceeded {:.1f}% tolerance compared to golden results:\n".format(error_tolerance*100)+data_string)
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return data_matches
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def isclose(self,key,value,actual_value,error_tolerance=1e-2):
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@ -132,7 +143,7 @@ class openram_test(unittest.TestCase):
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return False
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def relative_diff(self, value1, value2):
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""" Compute the relative difference of two values and normalize to the largest.
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""" Compute the relative difference of two values and normalize to the largest.
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If largest value is 0, just return the difference."""
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# Edge case to avoid divide by zero
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@ -148,7 +159,7 @@ class openram_test(unittest.TestCase):
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# Edge case where greater is a zero
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if norm_value == 0:
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min_value = abs(min(value1, value2))
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return abs(value1 - value2) / norm_value
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@ -162,15 +173,15 @@ class openram_test(unittest.TestCase):
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"""Compare two files.
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Arguments:
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filename1 -- First file name
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filename2 -- Second file name
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Return value:
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True if the files are the same, False otherwise.
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"""
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import re
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import debug
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@ -203,7 +214,7 @@ class openram_test(unittest.TestCase):
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debug.info(3,"line1_floats: "+str(line1_floats))
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debug.info(3,"line2_floats: "+str(line2_floats))
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# 2. Remove the floats from the string
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for f in line1_floats:
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line1=line1.replace(f,"",1)
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@ -215,10 +226,10 @@ class openram_test(unittest.TestCase):
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# 3. Convert to floats rather than strings
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line1_floats = [float(x) for x in line1_floats]
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line2_floats = [float(x) for x in line1_floats]
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# 4. Check if remaining string matches
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if line1 != line2:
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#Uncomment if you want to see all the individual chars of the two lines
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#Uncomment if you want to see all the individual chars of the two lines
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#print(str([i for i in line1]))
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#print(str([i for i in line2]))
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if mismatches==0:
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@ -281,13 +292,13 @@ class openram_test(unittest.TestCase):
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debug.info(2,"MATCH {0} {1}".format(filename1,filename2))
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return True
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def header(filename, technology):
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# Skip the header for gitlab regression
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import getpass
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if getpass.getuser() == "gitlab-runner":
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return
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tst = "Running Test for:"
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print("\n")
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print(" ______________________________________________________________________________ ")
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@ -6,11 +6,11 @@
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# All rights reserved.
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#
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"""
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This is a DRC/LVS/PEX interface file for magic + netgen.
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This is a DRC/LVS/PEX interface file for magic + netgen.
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We include the tech file for SCN4M_SUBM in the tech directory,
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that is included in OpenRAM during DRC.
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You can use this interactively by appending the magic system path in
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that is included in OpenRAM during DRC.
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You can use this interactively by appending the magic system path in
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your .magicrc file
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path sys /Users/mrg/openram/technology/scn3me_subm/tech
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@ -33,7 +33,7 @@ num_drc_runs = 0
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num_lvs_runs = 0
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num_pex_runs = 0
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def write_magic_script(cell_name, extract=False, final_verification=False):
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""" Write a magic script to perform DRC and optionally extraction. """
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@ -69,7 +69,7 @@ def write_magic_script(cell_name, extract=False, final_verification=False):
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if final_verification:
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f.write(pre+"extract unique all\n".format(cell_name))
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f.write(pre+"extract\n".format(cell_name))
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#f.write(pre+"ext2spice hierarchy on\n")
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#f.write(pre+"ext2spice hierarchy on\n")
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#f.write(pre+"ext2spice scale off\n")
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# lvs exists in 8.2.79, but be backword compatible for now
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#f.write(pre+"ext2spice lvs\n")
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@ -82,18 +82,18 @@ def write_magic_script(cell_name, extract=False, final_verification=False):
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f.write(pre+"ext2spice blackbox on\n")
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f.write(pre+"ext2spice subcircuit top auto\n")
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f.write(pre+"ext2spice global off\n")
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# Can choose hspice, ngspice, or spice3,
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# but they all seem compatible enough.
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#f.write(pre+"ext2spice format ngspice\n")
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f.write(pre+"ext2spice {}\n".format(cell_name))
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f.write("quit -noprompt\n")
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f.write("EOF\n")
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f.close()
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os.system("chmod u+x {}".format(run_file))
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def write_netgen_script(cell_name):
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""" Write a netgen script to perform LVS. """
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@ -119,7 +119,7 @@ def write_netgen_script(cell_name):
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f.close()
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os.system("chmod u+x {}".format(run_file))
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def run_drc(cell_name, gds_name, extract=True, final_verification=False):
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"""Run DRC check on a cell which is implemented in gds_name."""
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@ -129,7 +129,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
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# Copy file to local dir if it isn't already
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if os.path.dirname(gds_name)!=OPTS.openram_temp.rstrip('/'):
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shutil.copy(gds_name, OPTS.openram_temp)
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# Copy .magicrc file into temp dir
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magic_file = OPTS.openram_tech + "mag_lib/.magicrc"
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if os.path.exists(magic_file):
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@ -151,7 +151,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
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f = open(outfile, "r")
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except FileNotFoundError:
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debug.error("Unable to load DRC results file from {}. Is magic set up?".format(outfile),1)
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results = f.readlines()
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f.close()
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errors=1
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@ -162,7 +162,7 @@ def run_drc(cell_name, gds_name, extract=True, final_verification=False):
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break
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else:
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debug.error("Unable to find the total error line in Magic output.",1)
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# always display this summary
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if errors > 0:
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@ -189,19 +189,19 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
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shutil.copy(gds_name, OPTS.openram_temp)
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if os.path.dirname(sp_name)!=OPTS.openram_temp.rstrip('/'):
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shutil.copy(sp_name, OPTS.openram_temp)
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write_netgen_script(cell_name)
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(outfile, errfile, resultsfile) = run_script(cell_name, "lvs")
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total_errors = 0
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# check the result for these lines in the summary:
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try:
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f = open(resultsfile, "r")
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except FileNotFoundError:
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debug.error("Unable to load LVS results from {}".format(resultsfile),1)
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results = f.readlines()
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f.close()
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# Look for the results after the final "Subcircuit summary:"
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@ -217,14 +217,14 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
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test = re.compile("Property errors were found.")
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propertyerrors = list(filter(test.search, results))
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total_errors += len(propertyerrors)
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# Require pins to match?
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# Cell pin lists for pnand2_1.spice and pnand2_1 altered to match.
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# test = re.compile(".*altered to match.")
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# pinerrors = list(filter(test.search, results))
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# if len(pinerrors)>0:
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# debug.warning("Pins altered to match in {}.".format(cell_name))
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#if len(propertyerrors)>0:
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# debug.warning("Property errors found, but not checking them.")
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@ -232,7 +232,7 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
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test = re.compile("Netlists do not match.")
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incorrect = list(filter(test.search, final_results))
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total_errors += len(incorrect)
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# Netlists match uniquely.
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test = re.compile("match uniquely.")
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correct = list(filter(test.search, final_results))
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@ -244,7 +244,7 @@ def run_lvs(cell_name, gds_name, sp_name, final_verification=False):
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# Just print out the whole file, it is short.
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for e in results:
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debug.info(1,e.strip("\n"))
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debug.error("{0}\tLVS mismatch (results in {1})".format(cell_name,resultsfile))
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debug.error("{0}\tLVS mismatch (results in {1})".format(cell_name,resultsfile))
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else:
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debug.info(1, "{0}\tLVS matches".format(cell_name))
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@ -257,9 +257,9 @@ def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
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global num_pex_runs
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num_pex_runs += 1
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debug.warning("PEX using magic not implemented.")
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return 1
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#debug.warning("PEX using magic not implemented.")
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#return 1
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os.chdir(OPTS.openram_temp)
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from tech import drc
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if output == None:
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@ -271,25 +271,67 @@ def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
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run_drc(name, gds_name)
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run_lvs(name, gds_name, sp_name)
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"""
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2. magic can perform extraction with the following:
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#!/bin/sh
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rm -f $1.ext
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rm -f $1.spice
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magic -dnull -noconsole << EOF
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tech load SCN3ME_SUBM.30
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#scalegrid 1 2
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gds rescale no
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gds polygon subcell true
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gds warning default
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gds read $1
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extract
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ext2spice scale off
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ext2spice
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quit -noprompt
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EOF
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"""
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# pex_fix did run the pex using a script while dev orignial method
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# use batch mode.
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# the dev old code using batch mode does not run and is split into functions
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#pex_runset = write_batch_pex_rule(gds_name,name,sp_name,output)
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pex_runset = write_script_pex_rule(gds_name,name,output)
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errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
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# bash mode command from dev branch
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#batch_cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.pex_exe,
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# OPTS.openram_temp,
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# errfile,
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# outfile)
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script_cmd = "{0} 2> {1} 1> {2}".format(pex_runset,
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errfile,
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outfile)
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cmd = script_cmd
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debug.info(2, cmd)
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os.system(cmd)
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# rename technology models
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pex_nelist = open(output, 'r')
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s = pex_nelist.read()
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pex_nelist.close()
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s = s.replace('pfet','p')
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s = s.replace('nfet','n')
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f = open(output, 'w')
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f.write(s)
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f.close()
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# also check the output file
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f = open(outfile, "r")
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results = f.readlines()
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f.close()
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out_errors = find_error(results)
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debug.check(os.path.isfile(output),"Couldn't find PEX extracted output.")
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correct_port(name,output,sp_name)
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return out_errors
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def write_batch_pex_rule(gds_name,name,sp_name,output):
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"""
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The dev branch old batch mode runset
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2. magic can perform extraction with the following:
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#!/bin/sh
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rm -f $1.ext
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rm -f $1.spice
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magic -dnull -noconsole << EOF
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tech load SCN3ME_SUBM.30
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#scalegrid 1 2
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gds rescale no
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gds polygon subcell true
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gds warning default
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gds read $1
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extract
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ext2spice scale off
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ext2spice
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quit -noprompt
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EOF
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"""
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pex_rules = drc["xrc_rules"]
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pex_runset = {
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'pexRulesFile': pex_rules,
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@ -307,42 +349,89 @@ def run_pex(name, gds_name, sp_name, output=None, final_verification=False):
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}
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# write the runset file
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f = open(OPTS.openram_temp + "pex_runset", "w")
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for k in sorted(pex_runset.iterkeys()):
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file = OPTS.openram_temp + "pex_runset"
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f = open(file, "w")
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for k in sorted(pex_runset.keys()):
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f.write("*{0}: {1}\n".format(k, pex_runset[k]))
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f.close()
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return file
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# run pex
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
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def write_script_pex_rule(gds_name,cell_name,output):
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global OPTS
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run_file = OPTS.openram_temp + "run_pex.sh"
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f = open(run_file, "w")
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f.write("#!/bin/sh\n")
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f.write("{} -dnull -noconsole << eof\n".format(OPTS.drc_exe[1]))
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f.write("gds polygon subcell true\n")
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f.write("gds warning default\n")
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f.write("gds read {}\n".format(gds_name))
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f.write("load {}\n".format(cell_name))
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f.write("select top cell\n")
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f.write("expand\n")
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f.write("port makeall\n")
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extract = True
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if not extract:
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pre = "#"
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else:
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pre = ""
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f.write(pre+"extract\n".format(cell_name))
|
||||
#f.write(pre+"ext2spice hierarchy on\n")
|
||||
#f.write(pre+"ext2spice format ngspice\n")
|
||||
#f.write(pre+"ext2spice renumber off\n")
|
||||
#f.write(pre+"ext2spice scale off\n")
|
||||
#f.write(pre+"ext2spice blackbox on\n")
|
||||
f.write(pre+"ext2spice subcircuit top on\n")
|
||||
#f.write(pre+"ext2spice global off\n")
|
||||
f.write(pre+"ext2spice {}\n".format(cell_name))
|
||||
f.write("quit -noprompt\n")
|
||||
f.write("eof\n")
|
||||
f.write("mv {0}.spice {1}\n".format(cell_name,output))
|
||||
|
||||
cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.pex_exe,
|
||||
OPTS.openram_temp,
|
||||
errfile,
|
||||
outfile)
|
||||
debug.info(2, cmd)
|
||||
os.system(cmd)
|
||||
os.chdir(cwd)
|
||||
|
||||
# also check the output file
|
||||
f = open(outfile, "r")
|
||||
results = f.readlines()
|
||||
f.close()
|
||||
os.system("chmod u+x {}".format(run_file))
|
||||
return run_file
|
||||
|
||||
def find_error(results):
|
||||
# Errors begin with "ERROR:"
|
||||
test = re.compile("ERROR:")
|
||||
stdouterrors = list(filter(test.search, results))
|
||||
for e in stdouterrors:
|
||||
debug.error(e.strip("\n"))
|
||||
|
||||
out_errors = len(stdouterrors)
|
||||
|
||||
debug.check(os.path.isfile(output),"Couldn't find PEX extracted output.")
|
||||
|
||||
return out_errors
|
||||
|
||||
def correct_port(name, output_file_name, ref_file_name):
|
||||
pex_file = open(output_file_name, "r")
|
||||
contents = pex_file.read()
|
||||
# locate the start of circuit definition line
|
||||
match = re.search(".subckt " + str(name) + ".*", contents)
|
||||
match_index_start = match.start()
|
||||
pex_file.seek(match_index_start)
|
||||
rest_text = pex_file.read()
|
||||
# locate the end of circuit definition line
|
||||
match = re.search(r'\n', rest_text)
|
||||
match_index_end = match.start()
|
||||
# store the unchanged part of pex file in memory
|
||||
pex_file.seek(0)
|
||||
part1 = pex_file.read(match_index_start)
|
||||
pex_file.seek(match_index_start + match_index_end)
|
||||
part2 = pex_file.read()
|
||||
pex_file.close()
|
||||
|
||||
# obtain the correct definition line from the original spice file
|
||||
sp_file = open(ref_file_name, "r")
|
||||
contents = sp_file.read()
|
||||
circuit_title = re.search(".SUBCKT " + str(name) + ".*\n", contents)
|
||||
circuit_title = circuit_title.group()
|
||||
sp_file.close()
|
||||
|
||||
# write the new pex file with info in the memory
|
||||
output_file = open(output_file_name, "w")
|
||||
output_file.write(part1)
|
||||
output_file.write(circuit_title)
|
||||
output_file.write(part2)
|
||||
output_file.close()
|
||||
|
||||
def print_drc_stats():
|
||||
debug.info(1,"DRC runs: {0}".format(num_drc_runs))
|
||||
def print_lvs_stats():
|
||||
|
|
|
|||
Loading…
Reference in New Issue