mirror of https://github.com/VLSIDA/OpenRAM.git
Skeleton code for indirect DRC/LVS/PEX tools.
This commit is contained in:
Matt Guthaus
parent
29c5ab48f0
commit
3e0f39cd8e
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@ -97,11 +97,13 @@ def run_drc(name, gds_name):
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# run drc
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "%s%s.drc.err" % (OPTS.openram_temp, name)
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outfile = "%s%s.drc.out" % (OPTS.openram_temp, name)
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errfile = "{0}{1}.drc.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.drc.out".format(OPTS.openram_temp, name)
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cmd = "{0} -gui -drc {1}drc_runset -batch 2> {2} 1> {3}".format(
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OPTS.calibre_exe, OPTS.openram_temp, errfile, outfile)
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cmd = "{0} -gui -drc {1}drc_runset -batch 2> {2} 1> {3}".format(OPTS.drc_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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debug.info(1, cmd)
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os.system(cmd)
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os.chdir(cwd)
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@ -172,12 +174,14 @@ def run_lvs(name, gds_name, sp_name):
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# run LVS
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "%s%s.lvs.err" % (OPTS.openram_temp, name)
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outfile = "%s%s.lvs.out" % (OPTS.openram_temp, name)
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errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, name)
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cmd = "calibre -gui -lvs %slvs_runset -batch 2> %s 1> %s" % (
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OPTS.openram_temp, errfile, outfile)
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debug.info(2, cmd)
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cmd = "{0} -gui -lvs {1}lvs_runset -batch 2> {2} 1> {3}".format(OPTS.lvs_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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debug.info(1, cmd)
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os.system(cmd)
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os.chdir(cwd)
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@ -283,7 +287,7 @@ def run_pex(name, gds_name, sp_name, output=None):
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errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
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cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.calibre_exe,
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cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.pex_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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@ -1,7 +1,7 @@
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import hierarchy_layout
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import hierarchy_spice
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import globals
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import calibre
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import verify
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import debug
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import os
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@ -56,8 +56,8 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.sp_write(tempspice)
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self.gds_write(tempgds)
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debug.check(calibre.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
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debug.check(calibre.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
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debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
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debug.check(verify.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
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os.remove(tempspice)
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os.remove(tempgds)
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@ -66,7 +66,7 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
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if OPTS.check_lvsdrc:
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.gds_write(tempgds)
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debug.check(calibre.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
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debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
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os.remove(tempgds)
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def LVS(self):
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@ -76,7 +76,7 @@ class design(hierarchy_spice.spice, hierarchy_layout.layout):
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.sp_write(tempspice)
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self.gds_write(tempgds)
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debug.check(calibre.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
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debug.check(verify.run_lvs(self.name, tempgds, tempspice) == 0,"LVS failed for {0}".format(self.name))
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os.remove(tempspice)
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os.remove(tempgds)
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@ -115,8 +115,12 @@ def init_openram(config_file):
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set_spice()
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set_calibre()
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set_drc()
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set_lvs()
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set_pex()
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def read_config(config_file):
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global OPTS
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@ -154,30 +158,69 @@ def read_config(config_file):
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debug.error("Unable to make output directory.",-1)
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def find_exe(check_exe):
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""" Check if the binary exists in the path and return the full path. """
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# Check if the preferred spice option exists in the path
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for path in os.environ["PATH"].split(os.pathsep):
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exe = os.path.join(path, check_exe)
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# if it is found, then break and use first version
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if is_exe(exe):
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return exe
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return None
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def set_calibre():
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debug.info(2,"Finding calibre...")
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def set_drc():
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debug.info(2,"Finding DRC tool...")
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global OPTS
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# check if calibre is installed, if so, we should be running LVS/DRC on
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# everything.
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if not OPTS.check_lvsdrc:
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# over-ride the check LVS/DRC option
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debug.info(0,"Over-riding LVS/DRC. Not performing LVS/DRC.")
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debug.info(1,"LVS/DRC/PEX disabled.")
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return
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else:
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# see if calibre is in the path (extend to other tools later)
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for path in os.environ["PATH"].split(os.pathsep):
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OPTS.calibre_exe = os.path.join(path, "calibre")
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# if it is found, do inline LVS/DRC
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if is_exe(OPTS.calibre_exe):
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OPTS.check_lvsdrc = True
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debug.info(1, "Using calibre: " + OPTS.calibre_exe)
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break
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else:
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# otherwise, give warning and procede
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debug.warning("Calibre not found. Not performing LVS/DRC.")
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OPTS.check_lvsdrc = False
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import tech
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if tech.drc_version != "":
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OPTS.drc_exe=find_exe(tech.drc_version)
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if OPTS.drc_exe==None:
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debug.warning("{0} not found. Unable to perform DRC.".format(tech.drc_version))
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OPTS.check_lvsdrc = False
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else:
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debug.info(1, "Using DRC: " + OPTS.drc_exe)
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def set_lvs():
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debug.info(2,"Finding LVS tool...")
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global OPTS
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if not OPTS.check_lvsdrc:
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debug.info(1,"LVS/DRC/PEX disabled.")
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return
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else:
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import tech
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if tech.lvs_version != "":
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OPTS.lvs_exe=find_exe(tech.lvs_version)
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if OPTS.lvs_exe==None:
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debug.warning("{0} not found. Unable to perform LVS.".format(tech.lvs_version))
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OPTS.check_lvsdrc = False
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else:
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debug.info(1, "Using LVS: " + OPTS.lvs_exe)
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def set_pex():
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debug.info(2,"Finding PEX tool...")
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global OPTS
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if not OPTS.check_lvsdrc:
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debug.info(1,"LVS/DRC/PEX disabled.")
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return
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else:
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import tech
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if tech.pex_version != "":
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OPTS.pex_exe=find_exe(tech.pex_version)
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if OPTS.pex_exe==None:
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debug.warning("{0} not found. Unable to perform PEX.".format(tech.pex_version))
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OPTS.check_lvsdrc = False
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else:
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debug.info(1, "Using PEX: " + OPTS.pex_exe)
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def end_openram():
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""" Clean up openram for a proper exit """
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cleanup_paths()
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@ -234,16 +277,6 @@ def setup_paths():
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def find_spice(check_exe):
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# Check if the preferred spice option exists in the path
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for path in os.environ["PATH"].split(os.pathsep):
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spice_exe = os.path.join(path, check_exe)
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# if it is found, then break and use first version
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if is_exe(spice_exe):
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OPTS.spice_exe = spice_exe
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return True
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return False
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def set_spice():
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debug.info(2,"Finding spice...")
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global OPTS
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@ -252,13 +285,15 @@ def set_spice():
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debug.info(1,"Using analytical delay models (no characterization)")
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return
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else:
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spice_preferences = ["xa", "hspice", "ngspice", "ngspice.exe"]
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if OPTS.spice_version != "":
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if not find_spice(OPTS.spice_version):
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OPTS.spice_exe=find_exe(OPTS.spice_version)
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if OPTS.spice_exe==None:
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debug.error("{0} not found. Unable to perform characterization.".format(OPTS.spice_version),1)
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else:
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spice_preferences = ["xa", "hspice", "ngspice", "ngspice.exe"]
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for spice_name in spice_preferences:
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if find_spice(spice_name):
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OPTS.spice_exe = find_exe(spice_name)
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if OPTS.spice_exe!=None:
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OPTS.spice_version=spice_name
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debug.info(1, "Using spice: " + OPTS.spice_exe)
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break
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@ -0,0 +1,306 @@
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"""
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This is a DRC/LVS/PEX interface file for magic + netgen.
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1. magic can perform drc with the following:
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#!/bin/sh
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magic -dnull -noconsole << EOF
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tech load SCN3ME_SUBM.30
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** import gds file
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load $1.mag -force
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drc count
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drc why
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quit -noprompt
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EOF
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2. magic can perform extraction with the following:
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#!/bin/sh
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rm -f $1.ext
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rm -f $1.spice
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magic -dnull -noconsole << EOF
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tech load SCN3ME_SUBM.30
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** import gds file
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load $1.mag -force
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extract
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ext2spice scale off
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ext2spice
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quit -noprompt
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EOF
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3. netgen can perform LVS with:
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#!/bin/sh
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netgen -noconsole <<EOF
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readnet $1.spice
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readnet $1.sp
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ignore class c
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permute transistors
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compare hierarchical $1.spice {$1.sp $1}
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permute
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run converge
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EOF
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"""
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import os
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import re
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import time
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import debug
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import globals
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import subprocess
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def run_drc(name, gds_name):
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"""Run DRC check on a given top-level name which is
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implemented in gds_name."""
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debug.error("DRC using magic not implemented.",-1)
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OPTS = globals.get_opts()
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# the runset file contains all the options to run drc
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from tech import drc
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drc_rules = drc["drc_rules"]
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drc_runset = {
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'drcRulesFile': drc_rules,
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'drcRunDir': OPTS.openram_temp,
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'drcLayoutPaths': gds_name,
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'drcLayoutPrimary': name,
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'drcLayoutSystem': 'GDSII',
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'drcResultsformat': 'ASCII',
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'drcResultsFile': OPTS.openram_temp + name + ".drc.results",
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'drcSummaryFile': OPTS.openram_temp + name + ".drc.summary",
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'cmnFDILayerMapFile': drc["layer_map"],
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'cmnFDIUseLayerMap': 1
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}
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# write the runset file
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f = open(OPTS.openram_temp + "drc_runset", "w")
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for k in sorted(drc_runset.iterkeys()):
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f.write("*%s: %s\n" % (k, drc_runset[k]))
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f.close()
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# run drc
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "{0}{1}.drc.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.drc.out".format(OPTS.openram_temp, name)
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cmd = "{0} -gui -drc {1}drc_runset -batch 2> {2} 1> {3}".format(OPTS.drc_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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debug.info(1, cmd)
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os.system(cmd)
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os.chdir(cwd)
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# check the result for these lines in the summary:
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# TOTAL Original Layer Geometries: 106 (157)
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# TOTAL DRC RuleChecks Executed: 156
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# TOTAL DRC Results Generated: 0 (0)
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try:
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f = open(drc_runset['drcSummaryFile'], "r")
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except:
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debug.error("Unable to retrieve DRC results file. Is magic set up?",1)
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results = f.readlines()
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f.close()
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# those lines should be the last 3
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results = results[-3:]
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geometries = int(re.split("\W+", results[0])[5])
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rulechecks = int(re.split("\W+", results[1])[4])
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errors = int(re.split("\W+", results[2])[5])
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# always display this summary
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if errors > 0:
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debug.error("%-25s\tGeometries: %d\tChecks: %d\tErrors: %d" %
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(name, geometries, rulechecks, errors))
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else:
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debug.info(1, "%-25s\tGeometries: %d\tChecks: %d\tErrors: %d" %
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(name, geometries, rulechecks, errors))
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return errors
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def run_lvs(name, gds_name, sp_name):
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"""Run LVS check on a given top-level name which is
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implemented in gds_name and sp_name. """
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debug.error("LVS using magic+netgen not implemented.",-1)
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OPTS = globals.get_opts()
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from tech import drc
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lvs_rules = drc["lvs_rules"]
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lvs_runset = {
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'lvsRulesFile': lvs_rules,
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'lvsRunDir': OPTS.openram_temp,
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'lvsLayoutPaths': gds_name,
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'lvsLayoutPrimary': name,
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'lvsSourcePath': sp_name,
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'lvsSourcePrimary': name,
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'lvsSourceSystem': 'SPICE',
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'lvsSpiceFile': OPTS.openram_temp + "extracted.sp",
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'lvsPowerNames': 'vdd',
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'lvsGroundNames': 'gnd',
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'lvsIncludeSVRFCmds': 1,
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'lvsSVRFCmds': '{VIRTUAL CONNECT NAME VDD? GND? ?}',
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'lvsIgnorePorts': 1,
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'lvsERCDatabase': OPTS.openram_temp + name + ".erc.results",
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'lvsERCSummaryFile': OPTS.openram_temp + name + ".erc.summary",
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'lvsReportFile': OPTS.openram_temp + name + ".lvs.report",
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'lvsMaskDBFile': OPTS.openram_temp + name + ".maskdb",
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'cmnFDILayerMapFile': drc["layer_map"],
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'cmnFDIUseLayerMap': 1,
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'cmnVConnectNames': 'vdd, gnd',
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#'cmnVConnectNamesState' : 'ALL', #connects all nets with the same name
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}
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# write the runset file
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f = open(OPTS.openram_temp + "lvs_runset", "w")
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for k in sorted(lvs_runset.iterkeys()):
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f.write("*%s: %s\n" % (k, lvs_runset[k]))
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f.close()
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# run LVS
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cwd = os.getcwd()
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os.chdir(OPTS.openram_temp)
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errfile = "{0}{1}.lvs.err".format(OPTS.openram_temp, name)
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outfile = "{0}{1}.lvs.out".format(OPTS.openram_temp, name)
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cmd = "{0} -gui -lvs {1}lvs_runset -batch 2> {2} 1> {3}".format(OPTS.lvs_exe,
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OPTS.openram_temp,
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errfile,
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outfile)
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debug.info(1, cmd)
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os.system(cmd)
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os.chdir(cwd)
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# check the result for these lines in the summary:
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f = open(lvs_runset['lvsReportFile'], "r")
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results = f.readlines()
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f.close()
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# NOT COMPARED
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# CORRECT
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# INCORRECT
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test = re.compile("# CORRECT #")
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correct = filter(test.search, results)
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test = re.compile("NOT COMPARED")
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notcompared = filter(test.search, results)
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test = re.compile("# INCORRECT #")
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incorrect = filter(test.search, results)
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# Errors begin with "Error:"
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test = re.compile("\s+Error:")
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errors = filter(test.search, results)
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for e in errors:
|
||||
debug.error(e.strip("\n"))
|
||||
|
||||
summary_errors = len(notcompared) + len(incorrect) + len(errors)
|
||||
|
||||
# also check the extraction summary file
|
||||
f = open(lvs_runset['lvsReportFile'] + ".ext", "r")
|
||||
results = f.readlines()
|
||||
f.close()
|
||||
|
||||
test = re.compile("ERROR:")
|
||||
exterrors = filter(test.search, results)
|
||||
for e in exterrors:
|
||||
debug.error(e.strip("\n"))
|
||||
|
||||
test = re.compile("WARNING:")
|
||||
extwarnings = filter(test.search, results)
|
||||
for e in extwarnings:
|
||||
debug.warning(e.strip("\n"))
|
||||
|
||||
# MRG - 9/26/17 - Change this to exclude warnings because of
|
||||
# multiple labels on different pins in column mux.
|
||||
ext_errors = len(exterrors)
|
||||
ext_warnings = len(extwarnings)
|
||||
|
||||
# also check the output file
|
||||
f = open(outfile, "r")
|
||||
results = f.readlines()
|
||||
f.close()
|
||||
|
||||
# Errors begin with "ERROR:"
|
||||
test = re.compile("ERROR:")
|
||||
stdouterrors = filter(test.search, results)
|
||||
for e in stdouterrors:
|
||||
debug.error(e.strip("\n"))
|
||||
|
||||
out_errors = len(stdouterrors)
|
||||
|
||||
total_errors = summary_errors + out_errors + ext_errors
|
||||
return total_errors
|
||||
|
||||
|
||||
def run_pex(name, gds_name, sp_name, output=None):
|
||||
"""Run pex on a given top-level name which is
|
||||
implemented in gds_name and sp_name. """
|
||||
|
||||
debug.error("PEX using magic not implemented.",-1)
|
||||
|
||||
OPTS = globals.get_opts()
|
||||
from tech import drc
|
||||
if output == None:
|
||||
output = name + ".pex.netlist"
|
||||
|
||||
# check if lvs report has been done
|
||||
# if not run drc and lvs
|
||||
if not os.path.isfile(name + ".lvs.report"):
|
||||
run_drc(name, gds_name)
|
||||
run_lvs(name, gds_name, sp_name)
|
||||
|
||||
pex_rules = drc["xrc_rules"]
|
||||
pex_runset = {
|
||||
'pexRulesFile': pex_rules,
|
||||
'pexRunDir': OPTS.openram_temp,
|
||||
'pexLayoutPaths': gds_name,
|
||||
'pexLayoutPrimary': name,
|
||||
#'pexSourcePath' : OPTS.openram_temp+"extracted.sp",
|
||||
'pexSourcePath': sp_name,
|
||||
'pexSourcePrimary': name,
|
||||
'pexReportFile': name + ".lvs.report",
|
||||
'pexPexNetlistFile': output,
|
||||
'pexPexReportFile': name + ".pex.report",
|
||||
'pexMaskDBFile': name + ".maskdb",
|
||||
'cmnFDIDEFLayoutPath': name + ".def",
|
||||
}
|
||||
|
||||
# write the runset file
|
||||
f = open(OPTS.openram_temp + "pex_runset", "w")
|
||||
for k in sorted(pex_runset.iterkeys()):
|
||||
f.write("*{0}: {1}\n".format(k, pex_runset[k]))
|
||||
f.close()
|
||||
|
||||
# run pex
|
||||
cwd = os.getcwd()
|
||||
os.chdir(OPTS.openram_temp)
|
||||
errfile = "{0}{1}.pex.err".format(OPTS.openram_temp, name)
|
||||
outfile = "{0}{1}.pex.out".format(OPTS.openram_temp, name)
|
||||
|
||||
cmd = "{0} -gui -pex {1}pex_runset -batch 2> {2} 1> {3}".format(OPTS.pex_exe,
|
||||
OPTS.openram_temp,
|
||||
errfile,
|
||||
outfile)
|
||||
debug.info(2, cmd)
|
||||
os.system(cmd)
|
||||
os.chdir(cwd)
|
||||
|
||||
# also check the output file
|
||||
f = open(outfile, "r")
|
||||
results = f.readlines()
|
||||
f.close()
|
||||
|
||||
# Errors begin with "ERROR:"
|
||||
test = re.compile("ERROR:")
|
||||
stdouterrors = filter(test.search, results)
|
||||
for e in stdouterrors:
|
||||
debug.error(e.strip("\n"))
|
||||
|
||||
out_errors = len(stdouterrors)
|
||||
|
||||
assert(os.path.isfile(output))
|
||||
#correct_port(name, output, sp_name)
|
||||
|
||||
return out_errors
|
||||
|
||||
|
|
@ -36,7 +36,7 @@ class nand_3(design.design):
|
|||
|
||||
self.add_pins()
|
||||
self.create_layout()
|
||||
self.DRC_LVS()
|
||||
#self.DRC_LVS()
|
||||
|
||||
def add_pins(self):
|
||||
""" add pics for this module """
|
||||
|
|
|
|||
|
|
@ -10,12 +10,6 @@ a Liberty (.lib) file for timing analysis/optimization
|
|||
|
||||
"""
|
||||
|
||||
__author__ = "Matthew Guthaus (mrg@ucsc.edu) and numerous others"
|
||||
__version__ = "$Revision: 0.9 $"
|
||||
__copyright__ = "Copyright (c) 2015 UCSC and OSU"
|
||||
__license__ = "This is not currently licensed for use outside of UCSC's VLSI-DA and OSU's VLSI group."
|
||||
|
||||
|
||||
import sys,os
|
||||
import datetime
|
||||
import re
|
||||
|
|
@ -72,17 +66,18 @@ print("Output files are " + OPTS.output_name + ".(sp|gds|v|lib|lef)")
|
|||
print("Technology: {0}".format(OPTS.tech_name))
|
||||
print("Word size: {0}\nWords: {1}\nBanks: {2}".format(word_size,num_words,num_banks))
|
||||
|
||||
if not OPTS.check_lvsdrc:
|
||||
print("DRC/LVS/PEX checking is disabled.")
|
||||
|
||||
if OPTS.analytical_delay:
|
||||
print("Using analytical delay models (no characterization)")
|
||||
else:
|
||||
print("Performing simulation-based characterization with {}".format(OPTS.spice_version))
|
||||
|
||||
if OPTS.trim_netlist:
|
||||
print("Trimming netlist to speed up characterization (sacrificing some accuracy).")
|
||||
if OPTS.trim_netlist:
|
||||
print("Trimming netlist to speed up characterization (sacrificing some accuracy).")
|
||||
|
||||
# only start importing modules after we have the config file
|
||||
import calibre
|
||||
import verify
|
||||
import sram
|
||||
|
||||
start_time = datetime.datetime.now()
|
||||
|
|
@ -111,7 +106,7 @@ last_time=print_time("Spice writing", datetime.datetime.now(), last_time)
|
|||
sram_file = spname
|
||||
if OPTS.use_pex:
|
||||
sram_file = OPTS.output_path + "temp_pex.sp"
|
||||
calibre.run_pex(s.name, gdsname, spname, output=sram_file)
|
||||
verify.run_pex(s.name, gdsname, spname, output=sram_file)
|
||||
|
||||
# Characterize the design
|
||||
import lib
|
||||
|
|
|
|||
|
|
@ -22,8 +22,10 @@ class options(optparse.Values):
|
|||
spice_version = ""
|
||||
# Should we print out the banner at startup
|
||||
print_banner = True
|
||||
# The Calibre executable being used which is derived from the user PATH.
|
||||
calibre_exe = ""
|
||||
# The DRC/LVS/PEX executable being used which is derived from the user PATH.
|
||||
drc_exe = ""
|
||||
lvs_exe = ""
|
||||
pex_exe = ""
|
||||
# The spice executable being used which is derived from the user PATH.
|
||||
spice_exe = ""
|
||||
# Run with extracted parasitics
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
"""
|
||||
This is a module that will import the correct DRC/LVS/PEX
|
||||
module based on what tools are found. It is a layer of indirection
|
||||
to enable multiple verification tool support.
|
||||
|
||||
Each DRC/LVS/PEX tool should implement the functions run_drc, run_lvs, and
|
||||
run_pex, repsectively. If there is an error, they should abort and report the errors.
|
||||
If not, OpenRAM will continue as if nothing happened!
|
||||
"""
|
||||
|
||||
import debug
|
||||
import tech
|
||||
|
||||
if tech.drc_version=="calibre":
|
||||
from calibre import run_drc
|
||||
elif tech.drc_version=="magic":
|
||||
from magic import run_drc
|
||||
else:
|
||||
debug.warning("Did not find a supported DRC tool.")
|
||||
|
||||
if tech.lvs_version=="calibre":
|
||||
from calibre import run_lvs
|
||||
elif tech.lvs_version=="netgen":
|
||||
from magic import run_lvs
|
||||
else:
|
||||
debug.warning("Did not find a supported LVS tool.")
|
||||
|
||||
|
||||
if tech.pex_version=="calibre":
|
||||
from calibre import run_pex
|
||||
elif tech.pex_version=="magic":
|
||||
from magic import run_pex
|
||||
else:
|
||||
debug.warning("Did not find a supported PEX tool.")
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
import os
|
||||
|
||||
"""
|
||||
File containing the process technology parameters.
|
||||
File containing the process technology parameters for FreePDK 45nm.
|
||||
"""
|
||||
|
||||
info = {}
|
||||
|
|
@ -17,9 +17,13 @@ GDS["unit"] = (0.0005,1e-9)
|
|||
# default label zoom
|
||||
GDS["zoom"] = 0.05
|
||||
|
||||
#####################################################################################################
|
||||
##GDS Layer Map######################################################################################
|
||||
#####################################################################################################
|
||||
drc_version = "calibre"
|
||||
lvs_version = "calibre"
|
||||
pex_version = "calibre"
|
||||
|
||||
###################################################
|
||||
##GDS Layer Map
|
||||
###################################################
|
||||
|
||||
# create the GDS layer map
|
||||
# FIXME: parse the gds layer map from the cadence map?
|
||||
|
|
@ -56,13 +60,13 @@ layer["metal10"] = 29
|
|||
layer["text"] = 239
|
||||
layer["boundary"]= 239
|
||||
|
||||
#####################################################################################################
|
||||
##END GDS Layer Map##################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##END GDS Layer Map
|
||||
###################################################
|
||||
|
||||
#####################################################################################################
|
||||
##DRC/LVS Rules Setup################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##DRC/LVS Rules Setup
|
||||
###################################################
|
||||
|
||||
#technology parameter
|
||||
parameter={}
|
||||
|
|
@ -243,13 +247,13 @@ drc["metal10_to_metal10"] = 0.14
|
|||
drc["metal10_extend_via9"] = 0
|
||||
drc["metal10_enclosure_via9"] = 0
|
||||
|
||||
#####################################################################################################
|
||||
##END DRC/LVS Rules##################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##END DRC/LVS Rules
|
||||
###################################################
|
||||
|
||||
#####################################################################################################
|
||||
##Spice Simulation Parameters########################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##Spice Simulation Parameters
|
||||
###################################################
|
||||
|
||||
#spice info
|
||||
spice = {}
|
||||
|
|
@ -298,3 +302,9 @@ spice["msflop_setup"] = 9 # DFF setup time in ps
|
|||
spice["msflop_hold"] = 1 # DFF hold time in ps
|
||||
spice["msflop_delay"] = 20.5 # DFF Clk-to-q delay in ps
|
||||
spice["msflop_slew"] = 13.1 # DFF output slew in ps w/ no load
|
||||
|
||||
|
||||
###################################################
|
||||
##END Spice Simulation Parameters
|
||||
###################################################
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,9 @@
|
|||
import os
|
||||
|
||||
"""
|
||||
Class containing the process technology parameters.
|
||||
File containing the process technology parameters for SCMOS 3me, subm, 180nm.
|
||||
"""
|
||||
|
||||
info={}
|
||||
info["name"]="scn3me_subm"
|
||||
info["body_tie_down"] = 0
|
||||
|
|
@ -16,9 +17,14 @@ GDS["unit"]=(0.001,1e-6)
|
|||
# default label zoom
|
||||
GDS["zoom"] = 0.5
|
||||
|
||||
#####################################################################################################
|
||||
##GDS Layer Map######################################################################################
|
||||
#####################################################################################################
|
||||
drc_version = "magic"
|
||||
lvs_version = "netgen"
|
||||
pex_version = "magic"
|
||||
|
||||
|
||||
###################################################
|
||||
##GDS Layer Map
|
||||
###################################################
|
||||
|
||||
# create the GDS layer map
|
||||
layer={}
|
||||
|
|
@ -41,13 +47,13 @@ layer["metal3"] = 62
|
|||
layer["text"] = 83
|
||||
layer["boundary"] = 83
|
||||
|
||||
#####################################################################################################
|
||||
##END GDS Layer Map##################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##END GDS Layer Map
|
||||
###################################################
|
||||
|
||||
#####################################################################################################
|
||||
##DRC/LVS Rules Setup################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##DRC/LVS Rules Setup
|
||||
###################################################
|
||||
|
||||
#technology parameter
|
||||
parameter={}
|
||||
|
|
@ -163,13 +169,13 @@ drc["metal3_extend_via2"] = 0.6
|
|||
drc["metal3_enclosure_via2"] = 0.6
|
||||
drc["minarea_metal3"] = 0
|
||||
|
||||
#####################################################################################################
|
||||
##END DRC/LVS Rules##################################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##END DRC/LVS Rules
|
||||
###################################################
|
||||
|
||||
#####################################################################################################
|
||||
##Spice Simulation Parameters########################################################################
|
||||
#####################################################################################################
|
||||
###################################################
|
||||
##Spice Simulation Parameters
|
||||
###################################################
|
||||
|
||||
# spice model info
|
||||
spice={}
|
||||
|
|
@ -218,3 +224,7 @@ spice["msflop_hold"] = 1 # DFF hold time in ps
|
|||
spice["msflop_delay"] = 20.5 # DFF Clk-to-q delay in ps
|
||||
spice["msflop_slew"] = 13.1 # DFF output slew in ps w/ no load
|
||||
|
||||
|
||||
###################################################
|
||||
##END Spice Simulation Parameters
|
||||
###################################################
|
||||
|
|
|
|||
Loading…
Reference in New Issue