sky130 rba passing :)

This commit is contained in:
Jesse Cirimelli-Low
2022-09-12 16:07:00 -07:00
parent 004ee3748d
commit 3b02a8846d
10 changed files with 77 additions and 28 deletions
@@ -29,10 +29,10 @@ class sky130_bitcell_array(bitcell_array, sky130_bitcell_base_array):
# This will create a default set of bitline/wordline names
self.create_all_bitline_names()
self.create_all_wordline_names()
self.create_netlist()
if not OPTS.netlist_only:
self.create_layout()
self.add_supply_pins()
def add_modules(self):
""" Add the modules used in this design """