mirror of https://github.com/VLSIDA/OpenRAM.git
Added script to extract data from datasheet output and store in CSV.
This commit is contained in:
Hunter Nichols
parent
0434e57609
commit
36b1bc1284
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import os
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import csv
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import re
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import sys
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import csv
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# Use the HTML file to extra the data. Easier to do than LIB
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data_file_ext = ".html"
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extended_name = "_extended" # Name addon of extended config file
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def gen_regex_float_group(num, separator):
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if num <= 0:
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return ''
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float_regex = '([-+]?[0-9]*\.?[0-9]*)'
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full_regex = float_regex
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for i in range(num-1):
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full_regex+=separator+float_regex
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return full_regex
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def import_module(mod_name, mod_path):
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spec = importlib.util.spec_from_file_location(mod_name, mod_path)
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mod = importlib.util.module_from_spec(spec)
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spec.loader.exec_module(mod)
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return mod
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def get_config_mods(openram_dir):
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# Get dataset name used by all the files e.g. sram_1b_16
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files_names = [name for name in os.listdir(openram_dir) if os.path.isfile(openram_dir+'/'+name)]
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log = [name for name in files_names if '.log' in name][0]
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dataset_name = log[:-4]
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print("Extracting dataset:{}".format(dataset_name))
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# Check that the config files exist (including special extended config)
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dir_path = openram_dir+"/"
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#sys.path.append(dir_path)
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imp_mod = None
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imp_mod_extended = None
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if not os.path.exists(openram_dir+'/'+dataset_name+".py"):
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print("Python module for {} not found. Returning...".format(dataset_name))
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else:
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imp_mod = import_module(dataset_name, openram_dir+"/"dataset_name+".py")
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if not os.path.exists(openram_dir+'/'+dataset_name+extended_name+".py"):
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print("Python module for {} not found. Returning...".format(dataset_name))
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else:
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imp_mod_extended = import_module(dataset_name+extended_name, openram_dir+"/"dataset_name+extended_name+".py")
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return imp_mod, imp_mod_extended
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def write_to_csv(csv_file, config_mod, config_mod_ext):
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writer = csv.writer(csv_file)
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feature_names = ['num_words',
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'word_size',
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'words_per_row',
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'local_array_size',
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'area',
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'process',
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'voltage',
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'temperature',
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'slew',
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'load']
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output_names = ['rise_delay',
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'fall_delay',
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'rise_slew',
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'fall_slew',
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'write1_power',
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'write0_power',
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'read1_power',
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'read0_power',
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'leakage_power']
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writer.writerow(feature_names+output_names)
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available_corners = imp_mod_extended.use_specified_corners
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try:
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load_slews = imp_mod.use_specified_load_slew
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except:
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load_slews = None
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if load_slews != None:
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num_items = len(load_slews)
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num_loads_or_slews = len(load_slews)
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else:
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# These are the defaults for openram
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num_items = 9
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num_loads_or_slews = 3
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multivalue_names = ['cell_rise_0',
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'cell_fall_0',
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'rise_transition_0',
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'fall_transition_0']
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singlevalue_names = ['write_rise_power_0',
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'write_fall_power_0',
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'read_rise_power_0',
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'read_fall_power_0']
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file_name = openram_dir+"/"+dataset_name+data_file_ext
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try:
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f = open(file_name, "r")
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except IOError:
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print("Unable to open spice output file: {0}".format(file_name))
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return None
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print("Opened file",file_name)
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contents = f.read()
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f.close()
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# Loop through corners, adding data for each corner
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for (process, voltage, temp) in available_corners:
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# Create a regex to search the datasheet for specified outputs
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voltage_str = "".join(['\\'+i if i=='.' else i for i in str(voltage)])
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area_regex = r"Area \(µm<sup>2<\/sup>\)<\/td><td>(\d+)"
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leakage_regex = r"leakage<\/td><td>([-+]?[0-9]*\.?[0-9]*)"
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slew_regex = r"rise transition<\/td><td>([-+]?[0-9]*\.?[0-9]*)"
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if load_slews == None:
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float_regex = gen_regex_float_group(num_loads_or_slews, ', ')
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inp_slews_regex = r"{},{}.*{},{},{},.*slews,\[{}".format(
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dataset_name,
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imp_mod.num_words,
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str(temp),
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voltage_str,
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process,
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float_regex)
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loads_regex = r"{},{}.*{},{},{},.*loads,\[{}".format(
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dataset_name,
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imp_mod.num_words,
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str(temp),
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voltage_str,
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process,
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float_regex)
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float_regex = gen_regex_float_group(num_items, ', ')
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multivalue_regexs = []
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for value_identifier in multivalue_names:
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regex_str = r"{},{}.*{},{},{},.*{},\[{}".format(
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dataset_name,
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imp_mod.num_words,
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str(temp),
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voltage_str,
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process,
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value_identifier,
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float_regex)
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multivalue_regexs.append(regex_str)
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singlevalue_regexs = []
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for value_identifier in singlevalue_names:
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regex_str = r"{},{}.*{},{},{},.*{},([-+]?[0-9]*\.?[0-9]*)".format(
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dataset_name,
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imp_mod.num_words,
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str(temp),
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voltage_str,
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process,
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value_identifier,
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float_regex)
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singlevalue_regexs.append(regex_str)
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area_vals = re.search(area_regex,contents)
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leakage_vals = re.search(leakage_regex,contents)
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if load_slews == None:
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inp_slew_vals = re.search(inp_slews_regex,contents)
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load_vals = re.search(loads_regex,contents)
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datasheet_multivalues = [re.search(r,contents) for r in multivalue_regexs]
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datasheet_singlevalues = [re.search(r,contents) for r in singlevalue_regexs]
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for dval in datasheet_multivalues+datasheet_singlevalues:
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if dval == None:
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print("Error occurred while searching through datasheet: {}".format(file_name))
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return None
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# All the extracted values are delays but val[2] is the max delay
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feature_vals = [imp_mod.num_words,
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imp_mod.word_size,
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imp_mod_extended.words_per_row,
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imp_mod.local_array_size,
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area_vals[1],
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process,
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voltage,
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temp]
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if load_slews == None:
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c = 1
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for i in range(num_loads_or_slews):
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for j in range(num_loads_or_slews):
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multi_values = [val[i+j+c] for val in datasheet_multivalues]
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single_values = [val[1] for val in datasheet_singlevalues]
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writer.writerow(feature_vals+[inp_slew_vals[i+1], load_vals[j+1]]+multi_values+single_values+[leakage_vals[1]])
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c+=2
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else:
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# if num loads and num slews are not equal then this might break because of how OpenRAM formats
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# the outputs
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c = 1
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for load,slew in load_slews:
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multi_values = [val[c] for val in datasheet_multivalues]
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single_values = [val[1] for val in datasheet_singlevalues]
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writer.writerow(feature_vals+[slew, load]+multi_values+single_values+[leakage_vals[1]])
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c+=1
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def get_comparison_data(openram_dir, out_dir):
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"""Given an OpenRAM output dir, searches through datasheet files and ouputs
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a CSV files with data used in model."""
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# Get dataset name used by all the files e.g. sram_1b_16
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inp_mod, imp_mod_extended = get_config_mods(openram_dir)
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data_file = open("{}/sim_data.csv".format(out_dir), 'w', newline='')
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write_to_csv(data_file, inp_mod, imp_mod_extended)
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return out_dir
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if __name__ == "__main__":
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tech = "scn4m_subm"
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dir = '/soe/hznichol/git_repos/PrivateRAM/compiler/path_test'
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dir = get_comparison_data(tech, dir)
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print(dir)
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