mirror of https://github.com/VLSIDA/OpenRAM.git
Abstracted LEF added. Params for array wordline layers.
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@ -215,14 +215,14 @@ class local_bitcell_array(bitcell_base_array.bitcell_base_array):
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y_offset -= global_wl_pitch_factor * global_wl_pitch
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y_offset -= global_wl_pitch_factor * global_wl_pitch
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else:
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else:
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y_offset += global_wl_pitch_factor * global_wl_pitch
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y_offset += global_wl_pitch_factor * global_wl_pitch
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self.add_layout_pin_segment_center(text=wl_name,
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layer=global_wl_layer,
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start=vector(self.wl_insts[port].lx(), y_offset),
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end=vector(self.wl_insts[port].lx() + self.wl_array.width, y_offset))
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mid = vector(in_pin.cx(), y_offset)
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mid = vector(in_pin.cx(), y_offset)
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self.add_layout_pin_rect_center(text=wl_name,
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layer=global_wl_layer,
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offset=mid)
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self.add_path(local_wl_layer, [in_pin.center(), mid])
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# A short jog to the global line
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# A short jog to the global line
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self.add_via_stack_center(from_layer=in_pin.layer,
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self.add_via_stack_center(from_layer=in_pin.layer,
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to_layer=local_wl_layer,
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to_layer=local_wl_layer,
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