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Moved manual delay chain declarations from tech files to options.
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@@ -154,7 +154,7 @@ class bitcell_array(design.design):
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# Dynamic Power from Bitline
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bl_wire = self.gen_bl_wire()
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cell_load = 2 * bl_wire.return_input_cap()
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bl_swing = parameter["rbl_height_percentage"]
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bl_swing = OPTS.rbl_delay_percentage
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freq = spice["default_event_rate"]
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bitline_dynamic = self.calc_dynamic_power(corner, cell_load, freq, swing=bl_swing)
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