fixing drc on rom bank, mostly spacing tweaks

2026-09-03 16:31:08 +02:00 · 2023-10-31 23:24:21 -07:00
parent 75f7a5847f
commit 3271c5e73c
4 changed files with 9 additions and 5 deletions
@@ -187,7 +187,11 @@ class pinv_dec(pinv):

        # Pick point at right most of NMOS and connect over to PMOS
        nmos_drain_pos = nmos_drain_pin.lc()
-        right_side = vector(self.width, nmos_drain_pos.y)
+
+        if self.flip_io:
+            right_side = vector(self.pmos_inst.get_pin("D").cx(), nmos_drain_pos.y)
+        else:
+            right_side = vector(self.width, nmos_drain_pos.y)

        self.add_layout_pin_segment_center("Z",
                                           self.route_layer,