mirror of https://github.com/VLSIDA/OpenRAM.git
Rewrite enclose grids to be cleaner
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parent
013836bb3d
commit
2a9b5db6d4
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@ -34,7 +34,6 @@ class pin_group:
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# Remove any redundant pins (i.e. contained in other pins)
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self.remove_redundant_pins()
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self.router = router
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# These are the corresponding pin grids for each pin group.
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self.grids = set()
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@ -101,13 +100,11 @@ class pin_group:
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if local_debug:
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debug.info(0, "INITIAL: {}".format(pin_list))
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new_pin_list = pin_list.copy()
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remove_indices = set()
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add_indices = set(range(len(pin_list)))
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# This is n^2, but the number is small
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for index1, pin1 in enumerate(pin_list):
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# If we remove this pin, it can't contain other pins
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if index1 in remove_indices:
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if index1 not in add_indices:
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continue
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for index2, pin2 in enumerate(pin_list):
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@ -117,17 +114,15 @@ class pin_group:
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if index1 == index2:
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continue
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# If we already removed it, can't remove it again...
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if index2 in remove_indices:
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if index2 not in add_indices:
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continue
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if pin1.contains(pin2):
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if local_debug:
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debug.info(0, "{0} contains {1}".format(pin1, pin2))
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remove_indices.add(index2)
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add_indices.remove(index2)
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# Remove them in decreasing order to not invalidate the indices
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for i in sorted(remove_indices, reverse=True):
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del new_pin_list[i]
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new_pin_list = [pin_list[x] for x in add_indices]
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if local_debug:
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debug.info(0, "FINAL : {}".format(new_pin_list))
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@ -423,13 +418,15 @@ class pin_group:
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# We may have started with an empty set
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debug.check(len(self.grids) > 0, "Cannot seed an grid empty set.")
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common_blockages = self.router.get_blocked_grids() & self.grids
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# Start with the ll and make the widest row
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row = [ll]
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# Move in dir1 while we can
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while True:
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next_cell = row[-1] + offset1
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# Can't move if not in the pin shape
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if next_cell in self.grids and next_cell not in self.router.get_blocked_grids():
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if next_cell in self.grids and next_cell not in common_blockages:
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row.append(next_cell)
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else:
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break
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@ -438,7 +435,7 @@ class pin_group:
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next_row = [x + offset2 for x in row]
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for cell in next_row:
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# Can't move if any cell is not in the pin shape
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if cell not in self.grids or cell in self.router.get_blocked_grids():
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if cell not in self.grids or cell in common_blockages:
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break
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else:
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row = next_row
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@ -619,6 +616,11 @@ class pin_group:
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# Set of track adjacent to or paritally overlap a pin (not full DRC connection)
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partial_set = set()
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# for pin in self.pins:
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# lx = pin.lx()
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# ly = pin.by()
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# if lx > 87.9 and lx < 87.99 and ly > 18.56 and ly < 18.6:
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# breakpoint()
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for pin in self.pins:
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debug.info(4, " Converting {0}".format(pin))
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# Determine which tracks the pin overlaps
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@ -632,7 +634,8 @@ class pin_group:
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blockage_in_tracks = self.router.convert_blockage(pin)
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# Must include the pins here too because these are computed in a different
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# way than blockages.
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self.blockages.update(sufficient | insufficient | blockage_in_tracks)
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blockages = sufficient | insufficient | blockage_in_tracks
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self.blockages.update(blockages)
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# If we have a blockage, we must remove the grids
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# Remember, this excludes the pin blockages already
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