mirror of https://github.com/VLSIDA/OpenRAM.git
move layout pins when copying them
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d8e0f4275d
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@ -631,10 +631,11 @@ class layout():
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"""
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"""
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return self.pins
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return self.pins
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def copy_layout_pin(self, instance, pin_name, new_name=""):
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def copy_layout_pin(self, instance, pin_name, new_name="", relative_offset=vector(0, 0)):
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"""
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"""
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Create a copied version of the layout pin at the current level.
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Create a copied version of the layout pin at the current level.
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You can optionally rename the pin to a new name.
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You can optionally rename the pin to a new name.
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You can optionally add an offset vector by which to move the pin.
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"""
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"""
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pins = instance.get_pins(pin_name)
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pins = instance.get_pins(pin_name)
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@ -646,7 +647,7 @@ class layout():
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new_name = pin_name
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new_name = pin_name
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self.add_layout_pin(new_name,
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self.add_layout_pin(new_name,
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pin.layer,
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pin.layer,
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pin.ll(),
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pin.ll() + relative_offset,
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pin.width(),
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pin.width(),
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pin.height())
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pin.height())
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@ -307,7 +307,15 @@ class capped_bitcell_array(bitcell_base_array):
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for pin_name in self.replica_bitcell_array.get_pin_names():
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for pin_name in self.replica_bitcell_array.get_pin_names():
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if pin_name in excluded_pins:
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if pin_name in excluded_pins:
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continue
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continue
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self.copy_layout_pin(self.replica_bitcell_array_inst, pin_name)
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# move pins to edges of cap cells
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if "wl" in pin_name:
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pin_offset = self.bitcell_offset.scale(-1, 0)
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else:
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pin_offset = self.bitcell_offset.scale(0, -1)
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self.copy_layout_pin(instance=self.replica_bitcell_array_inst,
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pin_name=pin_name,
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relative_offset=pin_offset)
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def route_supplies(self):
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def route_supplies(self):
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