Initial work on separate delay and func simulation

2026-09-03 08:27:11 +02:00 · 2022-08-10 12:06:14 -07:00
parent caba726cfe
commit 28128157c0
6 changed files with 108 additions and 62 deletions
@@ -126,5 +126,3 @@ class design(hierarchy_design):
        for inst in self.insts:
            total_module_power += inst.mod.analytical_power(corner, load)
        return total_module_power
-
-