Save trimmed spice and stimulus

compiler/characterizer/delay.py

@@ -37,7 +37,7 @@ class delay(simulation):
 
     """
 
-    def __init__(self, sram, spfile, corner):
+    def __init__(self, sram, spfile, corner, output_path=None):
         super().__init__(sram, spfile, corner)
 
         self.targ_read_ports = []
@@ -47,6 +47,12 @@ class delay(simulation):
             self.num_wmasks = int(math.ceil(self.word_size / self.write_size))
         else:
             self.num_wmasks = 0
+
+        if output_path is None:
+            self.output_path = OPTS.openram_temp
+        else:
+            self.output_path = output_path
+
         self.set_load_slew(0, 0)
         self.set_corner(corner)
         self.create_signal_names()
@@ -385,12 +391,12 @@ class delay(simulation):
 
         # creates and opens stimulus file for writing
         self.delay_stim_sp = "delay_stim.sp"
-        temp_stim = "{0}/{1}".format(OPTS.openram_temp, self.delay_stim_sp)
+        temp_stim = "{0}/{1}".format(self.output_path, self.delay_stim_sp)
         self.sf = open(temp_stim, "w")
 
         # creates and opens measure file for writing
         self.delay_meas_sp = "delay_meas.sp"
-        temp_meas = "{0}/{1}".format(OPTS.openram_temp, self.delay_meas_sp)
+        temp_meas = "{0}/{1}".format(self.output_path, self.delay_meas_sp)
         self.mf = open(temp_meas, "w")
 
         if OPTS.spice_name == "spectre":
@@ -442,7 +448,7 @@ class delay(simulation):
 
         # creates and opens stimulus file for writing
         self.power_stim_sp = "power_stim.sp"
-        temp_stim = "{0}/{1}".format(OPTS.openram_temp, self.power_stim_sp)
+        temp_stim = "{0}/{1}".format(self.output_path, self.power_stim_sp)
         self.sf = open(temp_stim, "w")
         self.sf.write("* Power stimulus for period of {0}n\n\n".format(self.period))
         self.stim = stimuli(self.sf, self.corner)
@@ -1131,16 +1137,17 @@ class delay(simulation):
 
         # Set up to trim the netlist here if that is enabled
         if OPTS.trim_netlist:
-            self.trim_sp_file = "{0}trimmed.sp".format(OPTS.openram_temp)
+            self.trim_sp_file = "{0}trimmed.sp".format(self.output_path)
             self.sram.sp_write(self.trim_sp_file, lvs=False, trim=True)
         else:
             # The non-reduced netlist file when it is disabled
-            self.trim_sp_file = "{0}sram.sp".format(OPTS.openram_temp)
+            self.trim_sp_file = "{0}sram.sp".format(self.output_path)
 
         # The non-reduced netlist file for power simulation
-        self.sim_sp_file = "{0}sram.sp".format(OPTS.openram_temp)
+        self.sim_sp_file = "{0}sram.sp".format(self.output_path)
         # Make a copy in temp for debugging
-        shutil.copy(self.sp_file, self.sim_sp_file)
+        if self.sp_file != self.sim_sp_file:
+            shutil.copy(self.sp_file, self.sim_sp_file)
 
     def analysis_init(self, probe_address, probe_data):
         """Sets values which are dependent on the data address/bit being tested."""

compiler/characterizer/functional.py

@@ -383,7 +383,10 @@ class functional(simulation):
         temp_stim = "{0}/{1}".format(self.output_path, self.stim_sp)
         self.sf = open(temp_stim, "w")
         self.sf.write("* Functional test stimulus file for {0}ns period\n\n".format(self.period))
-        self.stim = stimuli(self.sf, self.corner)
+        self.meas_sp = "functional_meas.sp"
+        temp_meas = "{0}/{1}".format(self.output_path, self.meas_sp)
+        self.mf = open(temp_meas, "w")
+        self.stim = stimuli(self.sf, self.mf, self.corner)
 
         # Write include statements
         self.stim.write_include(self.sp_file)

compiler/modules/sram.py

@@ -8,7 +8,7 @@
 import datetime
 import os
 import debug
-from characterizer import functional
+from characterizer import functional, delay
 from base import timing_graph
 from globals import OPTS, print_time
 import shutil
@@ -115,6 +115,25 @@ class sram():
                    output_path=OPTS.output_path)
         print_time("Spice writing", datetime.datetime.now(), start_time)
 
+        # Save stimulus and measurement file
+        start_time = datetime.datetime.now()
+        debug.print_raw("DELAY: Writing stimulus...")
+        d = delay(self.s, self.get_sp_name(), ("TT", 5, 25), output_path=OPTS.output_path)
+        if (self.s.num_spare_rows == 0):
+            probe_address = "1" * self.s.addr_size
+        else:
+            probe_address = "0" + "1" * (self.s.addr_size - 1)
+        probe_data = self.s.word_size - 1
+        d.analysis_init(probe_address, probe_data)
+        d.targ_read_ports.extend(self.s.read_ports)
+        d.targ_write_ports = [self.s.write_ports[0]]
+        d.write_delay_stimulus()
+        print_time("DELAY", datetime.datetime.now(), start_time)
+
+        # Save trimmed spice file
+        temp_trim_sp = "{0}trimmed.sp".format(OPTS.output_path)
+        self.sp_write(temp_trim_sp, lvs=False, trim=True)
+
         if not OPTS.netlist_only:
             # Write the layout
             start_time = datetime.datetime.now()
@@ -188,13 +207,3 @@ class sram():
             debug.print_raw("Extended Config: Writing to {0}".format(oname))
             self.extended_config_write(oname)
             print_time("Extended Config", datetime.datetime.now(), start_time)
-
-        # Write the graph if specified
-        if OPTS.write_graph:
-            start_time = datetime.datetime.now()
-            oname = OPTS.output_path + OPTS.output_name + "_graph.json"
-            debug.print_raw("Graph: Writing to {0}".format(oname))
-            graph = timing_graph()
-            self.s.build_graph(graph, self.name, self.s.pins)
-            graph.write(oname)
-            print_time("Graph", datetime.datetime.now(), start_time)