mirror of https://github.com/VLSIDA/OpenRAM.git
Use local spacing rule
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parent
16e658726e
commit
1e486cd344
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@ -508,7 +508,7 @@ class hierarchical_decoder(design.design):
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length=self.height)
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length=self.height)
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self.route_bus_to_decoder()
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self.route_bus_to_decoder()
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self.route_predecodes_to_bus()
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self.route_predecodes_to_bus()
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def route_predecodes_to_bus(self):
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def route_predecodes_to_bus(self):
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"""
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"""
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@ -652,7 +652,7 @@ class hierarchical_decoder(design.design):
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offset=pin_pos,
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offset=pin_pos,
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directions=("H", "H"))
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directions=("H", "H"))
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self.predecode_bus_rail_pos.append(rail_pos)
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self.predecode_bus_rail_pos.append(rail_pos)
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def route_predecode_bus_inputs(self, rail_name, pin, x_offset, y_offset, predecode_type):
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def route_predecode_bus_inputs(self, rail_name, pin, x_offset, y_offset, predecode_type):
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"""
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"""
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Connect the routing rail to the given metal1 pin using a jog
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Connect the routing rail to the given metal1 pin using a jog
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@ -672,7 +672,7 @@ class hierarchical_decoder(design.design):
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#pin_pos = pin.center()
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#pin_pos = pin.center()
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#rail_pos = vector(self.predecode_bus[rail_name].cx(), pin_pos.y)
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#rail_pos = vector(self.predecode_bus[rail_name].cx(), pin_pos.y)
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#self.add_path(self.output_layer, [pin_pos, rail_pos])
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#self.add_path(self.output_layer, [pin_pos, rail_pos])
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# create via for dimensions
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# create via for dimensions
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from_layer = self.output_layer
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from_layer = self.output_layer
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to_layer = self.bus_layer
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to_layer = self.bus_layer
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@ -692,7 +692,7 @@ class hierarchical_decoder(design.design):
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layer_stack=curr_stack,
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layer_stack=curr_stack,
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dimensions=[1, 1],
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dimensions=[1, 1],
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directions=self.bus_directions)
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directions=self.bus_directions)
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overlapping_pin_space = drc["{0}_to_{0}".format(self.output_layer)]
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overlapping_pin_space = getattr(self, "{}_space".format(self.output_layer))
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total_buffer_space = (overlapping_pin_space + via.height)
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total_buffer_space = (overlapping_pin_space + via.height)
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while(True):
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while(True):
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drc_error = 0
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drc_error = 0
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@ -705,7 +705,7 @@ class hierarchical_decoder(design.design):
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else:
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else:
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y_offset += drc["grid"]
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y_offset += drc["grid"]
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rail_pos.y = y_offset
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rail_pos.y = y_offset
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if predecode_type == "pre2x4":
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if predecode_type == "pre2x4":
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right_pos = pin_pos
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right_pos = pin_pos
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elif predecode_type =="pre3x8":
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elif predecode_type =="pre3x8":
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