mirror of https://github.com/VLSIDA/OpenRAM.git
Merge remote-tracking branch 'origin/datasheet_gen' into supply_routing
This commit is contained in:
Matt Guthaus
commit
1c426aad29
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@ -8,6 +8,7 @@ The OpenRAM compiler has very few dependencies:
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* ngspice-26 (or later) or HSpice I-2013.12-1 (or later) or CustomSim 2017 (or later)
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* Python 3.5 and higher
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* Python numpy
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* flask_table
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* a setup script for each technology
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* a technology directory for each technology with the base cells
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@ -25,6 +25,8 @@ class lib:
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self.characterize_corners()
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def gen_port_names(self):
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"""Generates the port names to be written to the lib file"""
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#This is basically a copy and paste of whats in delay.py as well. Something more efficient should be done here.
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@ -96,7 +98,7 @@ class lib:
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debug.info(1,"Writing to {0}".format(lib_name))
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self.characterize()
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self.lib.close()
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self.parse_info()
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def characterize(self):
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""" Characterize the current corner. """
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@ -516,3 +518,36 @@ class lib:
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else:
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self.times = self.sh.analyze(self.slews,self.slews)
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def parse_info(self):
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if OPTS.is_unit_test:
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return
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datasheet = open(OPTS.openram_temp +'/datasheet.info', 'a+')
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for (corner, lib_name) in zip(self.corners, self.lib_files):
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ports = ""
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if OPTS.num_rw_ports>0:
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ports += "{}_".format(OPTS.num_rw_ports)
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if OPTS.num_w_ports>0:
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ports += "{}_".format(OPTS.num_w_ports)
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if OPTS.num_r_ports>0:
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ports += "{}_".format(OPTS.num_r_ports)
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datasheet.write("{0},{1},{2},{3},{4},{5},{6},{7},{8},{9},{10},{11},{12}".format("sram_{0}_{1}_{2}{3}".format(OPTS.word_size, OPTS.num_words, ports, OPTS.tech_name),
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OPTS.num_words,
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OPTS.num_banks,
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OPTS.num_rw_ports,
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OPTS.num_w_ports,
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OPTS.num_r_ports,
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OPTS.tech_name,
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self.corner[1],
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self.corner[2],
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self.corner[0],
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round_time(self.char_results["min_period"]),
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self.out_dir,
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lib_name))
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datasheet.close()
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@ -0,0 +1,17 @@
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from flask_table import *
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class characterization_corners(Table):
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corner_name = Col('Corner Name')
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process = Col('Process')
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power_supply = Col('Power Supply')
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temperature = Col('Temperature')
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library_name_suffix = Col('Library Name Suffix')
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class characterization_corners_item(object):
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def __init__(self, corner_name, process, power_supply, temperature, library_name_suffix):
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self.corner_name = corner_name
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self.process = process
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self.power_supply = power_supply
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self.temperature = temperature
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self.library_name_suffix = library_name_suffix
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@ -0,0 +1,55 @@
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from flask_table import *
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from operating_conditions import *
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from characterization_corners import *
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from deliverables import *
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from timing_and_current_data import *
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class datasheet():
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def __init__(self,identifier):
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self.corners = []
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self.timing = []
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self.operating = []
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self.dlv = []
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self.name = identifier
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self.html = ""
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def generate_html(self):
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self.html = """<style>
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#data {
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font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;
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border-collapse: collapse;
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width: 100%;
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max-width: 800px
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}
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#data td, #data th {
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border: 1px solid #ddd;
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padding: 8px;
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}
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#data tr:nth-child(even){background-color: #f2f2f2;}
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#data tr:hover {background-color: #ddd;}
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#data th {
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padding-top: 12px;
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padding-bottom: 12px;
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text-align: left;
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background-color: #4CAF50;
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color: white;
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}
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</style>"""
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>{0}</p>'
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Operating Conditions</p>'
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self.html += operating_conditions(self.operating,table_id='data').__html__()
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self.html += '<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Timing and Current Data</p>'
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self.html += timing_and_current_data(self.timing,table_id='data').__html__()
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self.html += '<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Characterization Corners</p>'
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self.html += characterization_corners(self.corners,table_id='data').__html__()
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self.html +='<p style=font-size: 20px;font-family: "Trebuchet MS", Arial, Helvetica, sans-serif;>Deliverables</p>'
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self.html += deliverables(self.dlv,table_id='data').__html__().replace('<','<').replace('"','"').replace('>',">")
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@ -0,0 +1,133 @@
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#!/usr/bin/env python3
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"""
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Datasheet Generator
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TODO:
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locate all port elements in .lib
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Locate all timing elements in .lib
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Diagram generation
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Improve css
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"""
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import os, math
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import optparse
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from flask_table import *
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import csv
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from globals import OPTS
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from deliverables import *
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from operating_conditions import *
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from timing_and_current_data import *
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from characterization_corners import *
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from datasheet import *
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def process_name(corner):
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if corner == "TT":
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return "Typical - Typical"
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if corner == "SS":
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return "Slow - Slow"
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if corner == "FF":
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return "Fast - Fast"
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else:
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return "custom"
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def parse_file(f,pages):
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with open(f) as csv_file:
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csv_reader = csv.reader(csv_file, delimiter=',')
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line_count = 0
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for row in csv_reader:
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found = 0
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NAME = row[0]
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NUM_WORDS = row[1]
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NUM_BANKS = row[2]
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NUM_RW_PORTS = row[3]
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NUM_W_PORTS = row[4]
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NUM_R_PORTS = row[5]
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TECH_NAME = row[6]
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TEMP = row[7]
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VOLT = row[8]
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PROC = row[9]
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MIN_PERIOD = row[10]
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OUT_DIR = row[11]
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LIB_NAME = row[12]
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for sheet in pages:
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if sheet.name == row[0]:
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found = 1
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#if the .lib information is for an existing datasheet compare timing data
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for item in sheet.operating:
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if item.parameter == 'Operating Temperature':
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if float(TEMP) > float(item.max):
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item.typ = item.max
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item.max = TEMP
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if float(TEMP) < float(item.min):
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item.typ = item.min
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item.min = TEMP
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if item.parameter == 'Power supply (VDD) range':
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if float(VOLT) > float(item.max):
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item.typ = item.max
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item.max = VOLT
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if float(VOLT) < float(item.min):
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item.typ = item.min
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item.min = VOLT
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if item.parameter == 'Operating Frequncy (F)':
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try:
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if float(math.floor(1000/float(MIN_PERIOD)) < float(item.max)):
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item.max = str(math.floor(1000/float(MIN_PERIOD)))
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except Exception:
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pass
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new_sheet.corners.append(characterization_corners_item(PROC,process_name(PROC),VOLT,TEMP,LIB_NAME.replace(OUT_DIR,'').replace(NAME,'')))
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new_sheet.dlv.append(deliverables_item('.lib','Synthesis models','<a href="file://{0}">{1}</a>'.format(LIB_NAME,LIB_NAME.replace(OUT_DIR,''))))
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if found == 0:
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new_sheet = datasheet(NAME)
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pages.append(new_sheet)
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new_sheet.corners.append(characterization_corners_item(PROC,process_name(PROC),VOLT,TEMP,LIB_NAME.replace(OUT_DIR,'').replace(NAME,'')))
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new_sheet.operating.append(operating_conditions_item('Power supply (VDD) range',VOLT,VOLT,VOLT,'Volts'))
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new_sheet.operating.append(operating_conditions_item('Operating Temperature',TEMP,TEMP,TEMP,'Celsius'))
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try:
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)','','',str(math.floor(1000/float(MIN_PERIOD))),'MHz'))
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except Exception:
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new_sheet.operating.append(operating_conditions_item('Operating Frequency (F)','','',"unknown",'MHz')) #analytical model fails to provide MIN_PERIOD
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new_sheet.timing.append(timing_and_current_data_item('1','2','3','4'))
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new_sheet.dlv.append(deliverables_item('.sp','SPICE netlists','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'sp')))
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new_sheet.dlv.append(deliverables_item('.v','Verilog simulation models','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'v')))
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new_sheet.dlv.append(deliverables_item('.gds','GDSII layout views','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'gds')))
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new_sheet.dlv.append(deliverables_item('.lef','LEF files','<a href="file://{0}{1}.{2}">{1}.{2}</a>'.format(OUT_DIR,NAME,'lef')))
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new_sheet.dlv.append(deliverables_item('.lib','Synthesis models','<a href="file://{0}">{1}</a>'.format(LIB_NAME,LIB_NAME.replace(OUT_DIR,''))))
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class datasheet_gen():
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def datasheet_write(name):
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in_dir = OPTS.openram_temp
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if not (os.path.isdir(in_dir)):
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os.mkdir(in_dir)
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#if not (os.path.isdir(out_dir)):
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# os.mkdir(out_dir)
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datasheets = []
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parse_file(in_dir + "/datasheet.info", datasheets)
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for sheets in datasheets:
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with open(name, 'w+') as f:
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sheets.generate_html()
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f.write(sheets.html)
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@ -0,0 +1,13 @@
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from flask_table import *
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class deliverables(Table):
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typ = Col('Type')
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description = Col('Description')
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link = Col('Link')
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class deliverables_item(object):
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def __init__(self, typ, description,link):
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self.typ = typ
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self.description = description
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self.link = link
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@ -0,0 +1,17 @@
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from flask_table import *
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class operating_conditions(Table):
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parameter = Col('Parameter')
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min = Col('Min')
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typ = Col('Typ')
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max = Col('Max')
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units = Col('Units')
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class operating_conditions_item(object):
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def __init__(self, parameter, min, typ, max, units):
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self.parameter = parameter
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self.min = min
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self.typ = typ
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self.max = max
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self.units = units
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@ -0,0 +1,16 @@
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from flask_table import *
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class timing_and_current_data(Table):
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parameter = Col('Parameter')
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min = Col('Min')
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max = Col('Max')
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units = Col('Units')
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class timing_and_current_data_item(object):
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def __init__(self, parameter, min, max, units):
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self.parameter = parameter
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self.min = min
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self.max = max
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self.units = units
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@ -8,7 +8,7 @@ supply_voltages = [1.0]
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temperatures = [25]
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}_{3}".format(word_size,num_words,num_banks,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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#Setting for multiport
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# netlist_only = True
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@ -8,12 +8,5 @@ supply_voltages = [ 5.0 ]
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temperatures = [ 25 ]
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}_{3}".format(word_size,num_words,num_banks,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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#Setting for multiport
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# netlist_only = True
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# bitcell = "pbitcell"
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# replica_bitcell="replica_pbitcell"
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# num_rw_ports = 1
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# num_r_ports = 1
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# num_w_ports = 0
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@ -26,7 +26,6 @@ if len(args) != 1:
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# These depend on arguments, so don't load them until now.
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import debug
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init_openram(config_file=args[0], is_unit_test=False)
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# Only print banner here so it's not in unit tests
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@ -39,8 +38,8 @@ report_status()
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import verify
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from sram import sram
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from sram_config import sram_config
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output_extensions = ["sp","v","lib"]
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#from parser import *
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output_extensions = ["sp","v","lib","html"]
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if not OPTS.netlist_only:
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output_extensions.extend(["gds","lef"])
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output_files = ["{0}.{1}".format(OPTS.output_name,x) for x in output_extensions]
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@ -57,7 +57,7 @@ class sram():
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def verilog_write(self,name):
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self.s.verilog_write(name)
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def save(self):
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""" Save all the output files while reporting time to do it as well. """
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@ -107,6 +107,14 @@ class sram():
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print("LEF: Writing to {0}".format(lefname))
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self.s.lef_write(lefname)
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print_time("LEF", datetime.datetime.now(), start_time)
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# Write the datasheet
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start_time = datetime.datetime.now()
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from datasheet_gen import datasheet_gen
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dname = OPTS.output_path + self.s.name + ".html"
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print("Datasheet: writing to {0}".format(dname))
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datasheet_gen.datasheet_write(dname)
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print_time("Datasheet", datetime.datetime.now(), start_time)
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# Write a verilog model
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start_time = datetime.datetime.now()
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@ -62,7 +62,12 @@ class openram_test(openram_test):
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import glob
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files = glob.glob('{0}/*.lib'.format(out_path))
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self.assertTrue(len(files)>0)
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# Make sure there is any .html file
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if os.path.exists(out_path):
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datasheets = glob.glob('{0}/*html'.format(out_path))
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self.assertTrue(len(datasheets)>0)
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# grep any errors from the output
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output_log = open("{0}/output.log".format(out_path),"r")
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output = output_log.read()
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|
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