mirror of https://github.com/VLSIDA/OpenRAM.git
Fix s_en spacing problem.
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@ -452,7 +452,6 @@ class sram_1bank(sram_base):
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y_bottom = 0
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y_offset = y_bottom - self.data_bus_size[port] + 2 * self.m3_pitch
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offset = vector(self.control_logic_insts[port].rx() + self.dff.width,
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y_offset)
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cr = channel_route(netlist=route_map,
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