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https://github.com/VLSIDA/OpenRAM.git
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Add vdd and gnd rails around bank structure.
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+14
-2
@@ -685,7 +685,7 @@ class sram(design.design):
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""" Create rails at bottom. Connect veritcal rails to top and bottom. """
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self.add_layout_pin(text="gnd",
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layer="metal3",
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layer="metal1",
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offset=vector(0,0),
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height=self.power_rail_width,
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width=self.width)
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@@ -703,10 +703,22 @@ class sram(design.design):
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for vdd_pin in vdd_pins:
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vdd_pos = vdd_pin.ul()
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# Route to bottom
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self.add_rect(layer="metal1",
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self.add_rect(layer="metal2",
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offset=vector(vdd_pos.x,self.power_rail_pitch),
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height=self.horz_control_bus_positions["vdd"].y-self.power_rail_pitch,
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width=vdd_pin.width())
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# Add vias at top
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rail_pos = vector(vdd_pin.ur().x,self.horz_control_bus_positions["vdd"].y)
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self.add_via(layers=("metal1","via1","metal2"),
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offset=rail_pos - vector(0,0.5*self.m1_width),
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rotate=90,
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size=[1,3])
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# Add vias at bottom
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rail_pos = vector(vdd_pin.lr().x,self.power_rail_pitch)
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self.add_via(layers=("metal1","via1","metal2"),
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offset=rail_pos,
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rotate=90,
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size=[2,3])
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gnd_pins = self.bank_inst[i].get_pins("gnd")
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for gnd_pin in gnd_pins:
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