mirror of https://github.com/VLSIDA/OpenRAM.git
PEP8 cleanup
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@ -7,12 +7,11 @@
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#
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#
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import debug
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import debug
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import design
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import design
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from tech import drc
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from contact import contact
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from vector import vector
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from vector import vector
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from globals import OPTS
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from globals import OPTS
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from sram_factory import factory
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from sram_factory import factory
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class delay_chain(design.design):
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class delay_chain(design.design):
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"""
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"""
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Generate a delay chain with the given number of stages and fanout.
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Generate a delay chain with the given number of stages and fanout.
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@ -37,7 +36,6 @@ class delay_chain(design.design):
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if not OPTS.netlist_only:
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if not OPTS.netlist_only:
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self.create_layout()
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self.create_layout()
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def create_netlist(self):
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def create_netlist(self):
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self.add_modules()
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self.add_modules()
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self.add_pins()
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self.add_pins()
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@ -126,7 +124,6 @@ class delay_chain(design.design):
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load_list[i].place(offset=inv_offset,
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load_list[i].place(offset=inv_offset,
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mirror=inv_mirror)
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mirror=inv_mirror)
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def add_route(self, pin1, pin2):
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def add_route(self, pin1, pin2):
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""" This guarantees that we route from the top to bottom row correctly. """
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""" This guarantees that we route from the top to bottom row correctly. """
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pin1_pos = pin1.center()
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pin1_pos = pin1.center()
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@ -163,7 +160,6 @@ class delay_chain(design.design):
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offset=z_pin.center())
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offset=z_pin.center())
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self.add_path("m3", [z_pin.center(), a_max.center()])
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self.add_path("m3", [z_pin.center(), a_max.center()])
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# Route Z to the A of the next stage
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# Route Z to the A of the next stage
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if i + 1 < len(self.driver_inst_list):
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if i + 1 < len(self.driver_inst_list):
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z_pin = inv.get_pin("Z")
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z_pin = inv.get_pin("Z")
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@ -174,7 +170,6 @@ class delay_chain(design.design):
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mid2_point = vector(next_a_pin.cx(), y_mid)
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mid2_point = vector(next_a_pin.cx(), y_mid)
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self.add_path("m2", [z_pin.center(), mid1_point, mid2_point, next_a_pin.center()])
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self.add_path("m2", [z_pin.center(), mid1_point, mid2_point, next_a_pin.center()])
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def add_layout_pins(self):
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def add_layout_pins(self):
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""" Add vdd and gnd rails and the input/output. Connect the gnd rails internally on
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""" Add vdd and gnd rails and the input/output. Connect the gnd rails internally on
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the top end with no input/output to obstruct. """
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the top end with no input/output to obstruct. """
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@ -202,7 +197,6 @@ class delay_chain(design.design):
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pin = load.get_pin(pin_name)
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pin = load.get_pin(pin_name)
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self.add_power_pin(pin_name, pin.rc())
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self.add_power_pin(pin_name, pin.rc())
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# input is A pin of first inverter
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# input is A pin of first inverter
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a_pin = self.driver_inst_list[0].get_pin("A")
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a_pin = self.driver_inst_list[0].get_pin("A")
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self.add_via_center(layers=self.m1_stack,
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self.add_via_center(layers=self.m1_stack,
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@ -212,7 +206,6 @@ class delay_chain(design.design):
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offset=a_pin.ll().scale(1, 0),
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offset=a_pin.ll().scale(1, 0),
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height=a_pin.cy())
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height=a_pin.cy())
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# output is A pin of last load inverter
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# output is A pin of last load inverter
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last_driver_inst = self.driver_inst_list[-1]
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last_driver_inst = self.driver_inst_list[-1]
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a_pin = self.rightest_load_inst[last_driver_inst].get_pin("A")
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a_pin = self.rightest_load_inst[last_driver_inst].get_pin("A")
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@ -234,11 +227,12 @@ class delay_chain(design.design):
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def determine_delayed_en_stage_efforts(self, ext_delayed_en_cout, inp_is_rise=True):
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def determine_delayed_en_stage_efforts(self, ext_delayed_en_cout, inp_is_rise=True):
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"""Get the stage efforts from the en to s_en. Does not compute the delay for the bitline load."""
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"""Get the stage efforts from the en to s_en. Does not compute the delay for the bitline load."""
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stage_effort_list = []
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stage_effort_list = []
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#Add a stage to the list for every stage in delay chain. Stages only differ in fanout except the last which has an external cout.
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# Add a stage to the list for every stage in delay chain.
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# Stages only differ in fanout except the last which has an external cout.
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last_stage_is_rise = inp_is_rise
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last_stage_is_rise = inp_is_rise
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for stage_fanout in self.fanout_list:
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for stage_fanout in self.fanout_list:
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stage_cout = self.inv.get_cin() * (stage_fanout + 1)
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stage_cout = self.inv.get_cin() * (stage_fanout + 1)
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if len(stage_effort_list) == len(self.fanout_list)-1: #last stage
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if len(stage_effort_list) == len(self.fanout_list) - 1:
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stage_cout+=ext_delayed_en_cout
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stage_cout+=ext_delayed_en_cout
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stage = self.inv.get_stage_effort(stage_cout, last_stage_is_rise)
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stage = self.inv.get_stage_effort(stage_cout, last_stage_is_rise)
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stage_effort_list.append(stage)
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stage_effort_list.append(stage)
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