mirror of https://github.com/VLSIDA/OpenRAM.git
Use the same inflating rules for all shapes in router
This commit is contained in:
parent
5b0f97860a
commit
08dad81214
|
|
@ -145,7 +145,7 @@ class router(router_tech):
|
||||||
# Skip this via if it's contained by an existing via blockage
|
# Skip this via if it's contained by an existing via blockage
|
||||||
if new_shape.contained_by_any(self.vias):
|
if new_shape.contained_by_any(self.vias):
|
||||||
continue
|
continue
|
||||||
self.vias.append(self.inflate_shape(new_shape, is_via=True))
|
self.vias.append(self.inflate_shape(new_shape))
|
||||||
|
|
||||||
|
|
||||||
def convert_vias(self):
|
def convert_vias(self):
|
||||||
|
|
@ -188,32 +188,31 @@ class router(router_tech):
|
||||||
break
|
break
|
||||||
|
|
||||||
|
|
||||||
def inflate_shape(self, shape, is_pin=False, is_via=False):
|
def inflate_shape(self, shape):
|
||||||
""" Inflate a given shape with spacing rules. """
|
""" Inflate a given shape with spacing rules. """
|
||||||
|
|
||||||
# Pins must keep their center lines away from any blockage to prevent
|
# Get the layer-specific spacing rule
|
||||||
# the nodes from being unconnected
|
if self.get_zindex(shape.lpp) == 1:
|
||||||
if is_pin:
|
spacing = self.vert_layer_spacing
|
||||||
xdiff = self.layer_widths[0] - shape.width()
|
|
||||||
ydiff = self.layer_widths[0] - shape.height()
|
|
||||||
diff = max(xdiff, ydiff) / 2
|
|
||||||
spacing = self.track_space + drc["grid"]
|
|
||||||
if diff > 0:
|
|
||||||
spacing += diff
|
|
||||||
# Vias are inflated by the maximum spacing rule
|
|
||||||
elif is_via:
|
|
||||||
spacing = self.track_space
|
|
||||||
# Blockages are inflated by their layer's corresponding spacing rule
|
|
||||||
else:
|
else:
|
||||||
if self.get_zindex(shape.lpp) == 1:
|
spacing = self.horiz_layer_spacing
|
||||||
spacing = self.vert_layer_spacing
|
|
||||||
else:
|
|
||||||
spacing = self.horiz_layer_spacing
|
|
||||||
# If the shape is wider than the supply wire width, its spacing can be
|
# If the shape is wider than the supply wire width, its spacing can be
|
||||||
# different
|
# different
|
||||||
wide = min(shape.width(), shape.height())
|
wide = min(shape.width(), shape.height())
|
||||||
if wide > self.layer_widths[0]:
|
if wide > self.layer_widths[0]:
|
||||||
spacing = self.get_layer_space(self.get_zindex(shape.lpp), wide)
|
spacing = self.get_layer_space(self.get_zindex(shape.lpp), wide)
|
||||||
|
|
||||||
|
# Shapes must keep their center lines away from any blockage to prevent
|
||||||
|
# the nodes from being unconnected
|
||||||
|
xdiff = self.track_wire - shape.width()
|
||||||
|
ydiff = self.track_wire - shape.height()
|
||||||
|
diff = snap(max(xdiff, ydiff) / 2)
|
||||||
|
if diff > 0:
|
||||||
|
spacing += diff
|
||||||
|
|
||||||
|
# Add minimum unit to the spacing to keep nodes out of inflated regions
|
||||||
|
spacing += drc["grid"]
|
||||||
|
|
||||||
return shape.inflated_pin(spacing=spacing,
|
return shape.inflated_pin(spacing=spacing,
|
||||||
extra_spacing=self.half_wire)
|
extra_spacing=self.half_wire)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -50,9 +50,10 @@ class signal_escape_router(router):
|
||||||
# Add vdd and gnd pins as blockages as well
|
# Add vdd and gnd pins as blockages as well
|
||||||
# NOTE: This is done to make vdd and gnd pins DRC-safe
|
# NOTE: This is done to make vdd and gnd pins DRC-safe
|
||||||
for pin in self.all_pins:
|
for pin in self.all_pins:
|
||||||
self.blockages.append(self.inflate_shape(pin, is_pin=True))
|
self.blockages.append(self.inflate_shape(pin))
|
||||||
|
|
||||||
# Route vdd and gnd
|
# Route vdd and gnd
|
||||||
|
i = 0
|
||||||
for source, target, _ in self.get_route_pairs(pin_names):
|
for source, target, _ in self.get_route_pairs(pin_names):
|
||||||
# Change fake pin's name so the graph will treat it as routable
|
# Change fake pin's name so the graph will treat it as routable
|
||||||
target.name = source.name
|
target.name = source.name
|
||||||
|
|
|
||||||
|
|
@ -65,7 +65,7 @@ class supply_router(router):
|
||||||
# Add vdd and gnd pins as blockages as well
|
# Add vdd and gnd pins as blockages as well
|
||||||
# NOTE: This is done to make vdd and gnd pins DRC-safe
|
# NOTE: This is done to make vdd and gnd pins DRC-safe
|
||||||
for pin in self.all_pins:
|
for pin in self.all_pins:
|
||||||
self.blockages.append(self.inflate_shape(pin, is_pin=True))
|
self.blockages.append(self.inflate_shape(pin))
|
||||||
|
|
||||||
# Route vdd and gnd
|
# Route vdd and gnd
|
||||||
for pin_name in [vdd_name, gnd_name]:
|
for pin_name in [vdd_name, gnd_name]:
|
||||||
|
|
@ -239,7 +239,7 @@ class supply_router(router):
|
||||||
# Save side pins for routing
|
# Save side pins for routing
|
||||||
self.new_pins[pin_name] = new_pins
|
self.new_pins[pin_name] = new_pins
|
||||||
for pin in new_pins:
|
for pin in new_pins:
|
||||||
self.blockages.append(self.inflate_shape(pin, is_pin=True))
|
self.blockages.append(self.inflate_shape(pin))
|
||||||
|
|
||||||
|
|
||||||
def get_mst_pairs(self, pins):
|
def get_mst_pairs(self, pins):
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue