mirror of https://github.com/VLSIDA/OpenRAM.git
html datasheet no longer dependeds on sram
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parent
192c615a38
commit
0556b86424
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@ -530,7 +530,7 @@ class lib:
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"sram_{0}_{1}_{2}".format(OPTS.word_size, OPTS.num_words, OPTS.tech_name),
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OPTS.num_words,
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OPTS.num_banks,
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OPTS.num_rw_ports,
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OPTS.num_rw_ports,
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OPTS.num_w_ports,
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OPTS.num_r_ports,
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OPTS.tech_name,
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@ -555,7 +555,7 @@ class lib:
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LVS = str(total_lvs_errors)
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datasheet.write("{0},{1},".format(DRC, LVS))
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datasheet.write(str(self.sram.width * self.sram.height)+',')
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for port in self.all_ports:
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#DIN timings
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if port in self.write_ports:
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@ -4,7 +4,7 @@ This is a script to load data from the characterization and layout processes int
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a web friendly html datasheet.
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"""
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# TODO:
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# include log file
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# include power
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# Diagram generation
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# Improve css
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@ -31,7 +31,7 @@ def process_name(corner):
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return "custom"
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def parse_characterizer_csv(sram, f, pages):
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def parse_characterizer_csv(f, pages):
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"""
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Parses output data of the Liberty file generator in order to construct the timing and
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current table
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@ -98,6 +98,8 @@ def parse_characterizer_csv(sram, f, pages):
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LVS = row[col]
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col += 1
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AREA = row[col]
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col += 1
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for sheet in pages:
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if sheet.name == NAME:
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@ -529,11 +531,11 @@ def parse_characterizer_csv(sram, f, pages):
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new_sheet.io_table.add_row(['NUM_RW_PORTS', NUM_RW_PORTS])
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new_sheet.io_table.add_row(['NUM_R_PORTS', NUM_R_PORTS])
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new_sheet.io_table.add_row(['NUM_W_PORTS', NUM_W_PORTS])
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new_sheet.io_table.add_row(['Area', sram.width * sram.height])
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new_sheet.io_table.add_row(['Area', AREA])
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class datasheet_gen():
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def datasheet_write(sram, name):
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def datasheet_write(name):
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in_dir = OPTS.openram_temp
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@ -541,7 +543,7 @@ class datasheet_gen():
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os.mkdir(in_dir)
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datasheets = []
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parse_characterizer_csv(sram, in_dir + "/datasheet.info", datasheets)
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parse_characterizer_csv(in_dir + "/datasheet.info", datasheets)
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for sheets in datasheets:
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with open(name, 'w+') as f:
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@ -122,7 +122,7 @@ class sram():
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from datasheet_gen import datasheet_gen
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dname = OPTS.output_path + self.s.name + ".html"
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debug.print_raw("Datasheet: Writing to {0}".format(dname))
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datasheet_gen.datasheet_write(self.s,dname)
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datasheet_gen.datasheet_write(dname)
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print_time("Datasheet", datetime.datetime.now(), start_time)
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# Write a verilog model
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